• Journal of the Institute of Convergence Signal Processing
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• v.12 no.4
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• pp.309-314
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• 2011

As a system becomes more complex, a design relies more heavily on a methodology based on high-level abstraction and functional verification. SystemVerilog includes characteristics of hardware design language and verification language in the form of extensions to the Verilog HDL. However, the OOP of System Veri log does not allow multiple inheritance. In this paper, we propose adoption of SystemC to introduce multiple inheritance. After being created, a SystemC unit is combined with a SystemVerilog-based verification environment using SystemVerilog DPI and ModelSim macro. Employing multiple inheritance of SystemC makes a design of a verification environment simple and easy through source code reuse. Moreover, a verification environment including SysemC unit has a benefit of reconfigurability due to OOP.

• Structural Engineering and Mechanics
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• v.5 no.3
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• pp.221-237
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• 1997

This paper presents a new uniaxial material model for rate-sensitive analysis addressing both the transient and steady-state responses. The new model adopts visco-plastic theory for the rate-sensitive response, and employs a three-parameter representation of the overstress as a function of the strain-rate. The third parameter is introduced in the new model to control its transient response characteristics, and to provide flexibility in fitting test data on the variation of overstress with strain-rate. Since the governing visco-plastic differential equation cannot be integrated analytically due to its inherent nonlinearity, a new single-step numerical integration procedure is proposed, which leads to high levels of accuracy almost independent of the size of the integration time-step. The new model is implemented within the nonlinear analysis program ADAPTIC, which is used to provide several verification examples and comparison with other experimental and numerical results. The companion paper extends the three-parameter model to trilinear static stress-strain relationships for steel and concrete, and presents application examples of the proposed models.

• IEMEK Journal of Embedded Systems and Applications
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• v.5 no.2
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• pp.67-76
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• 2010

Although both functional verification and performance evaluation are necessary for the development of effective and reliable communication systems, they have been often performed independently; by functional modeling with formal language tools and by performance modeling with professional network performance evaluation tools, respectively. Separate and repeated modeling of one system, however, would often result in cost increase and inconsistency between the models. This paper proposes an integrated model design approach in order to overcome this problem that evaluates the performance of a communication protocol designed in SDL with SDL-OPNET model conversion. The proposed technique generates OPNET skeleton code from Tau-generated C code of the SDL model by analyzing the relations between SDL and OPNET models. IEEE 802.2 LLC protocol was used as an example of model conversion to show the applicability and effectiveness of the proposed technique.

• Journal of KIISE:Software and Applications
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• v.31 no.6
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• pp.773-783
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• 2004

This paper presents a method for real-time verification of Statecharts. Statecharts has been widely used for real-time reactive systems, and supports two time models: synchronous and asynchronous. However, existing real-time verification methods for them are incompatible with the asynchronous time model or increase state space by introducing new variables to the target models. We solved these problems by extending existing model checking algorithms. The extended algorithms can be used with both time models of Statecharts because they consider time increasing transitions only. In addition, they do not increase target state space since they count those transitions internally without additional variables. We extended an existing model checker, NuSMV, based on the proposed algorithms and conducted some experiments to show their advantage.

• The Journal of the Acoustical Society of Korea
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• v.19 no.5
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• pp.20-26
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• 2000

In speaker verification system the HMM(hidden Markov model) parameter updating using small amount of data and the priori threshold decision are crucial factor for dealing with long-term variability in people voices. In the paper we present the speaker model updating technique which can be adaptable to the session-to-intra speaker variability and the priori threshold determining technique. The proposed technique decreases verification error rates which the session-to-session intra-speaker variability can bring by adapting new speech data to speaker model parameter through Baum Welch re-estimation. And in this study the proposed priori threshold determining technique is decided by a hybrid score measurement which combines the world model based technique and the cohen model based technique together. The results show that the proposed technique can lead a better performance and the difference of performance is small between the posteriori threshold decision based approach and the proposed priori threshold decision based approach.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.325-328
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• 2001

This paper describes a VHDL code coverage checker for If design and verification. Applying the verification coverage to IP design is a methodology rapidly gaining popularity. This enables the designers to improve the IP design quality and reduces the time-to-market by providing the Quantitative measure of simulation completeness and test benches. To support this methodology, a VHDL code coverage model was defined and the measurement tool was developed.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.06a
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• pp.873-876
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• 2003

Z-map model is the most widely used model for NC simulation and verification. But it has several limitations to get a high precision, to apply 5 axis machining simulation. In this paper, we tried to use quadtree for searching cutting region. Quadtree representation of two dimensional objects is performed with a tree that describes the recursive subdivision. By using these quadtree model. storage requirements were reduced. And also, recursive subdivision was processed in the boundries, so, useless computation could be reduced, too. To get more high Accuracy, we applied the supersampling method in the boundaries. The Supersampling method is the most common form of the antialiasing and usually used with polygon mesh rendering in computer graphics To verify quadtree model we compared simulated results with z-map model and enhanced z-map model

• Journal of Institute of Control, Robotics and Systems
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• v.9 no.7
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• pp.569-576
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• 2003

The data link layer of Foundation Fieldbus provides both token-passing and scheduling services for periodic, time-critical and time-available data. This study developed an analytical model that evaluates the delay performance of urgent data when the data link layer of Foundation Fieldbus provides token-passing service. The validity of analytical model is verified using an experimental model that consists of network interface boards of Foundation Fieldbus. Comparison of analytical and experimental models shows that the analytical model can be utilized in the approximate analysis of the delay characteristics of time-critical data in the Foundation Fieldbus. The analytical model can also be used in the basic design stage of Foundation Fieldbus network system.

• Journal of Nuclear Fuel Cycle and Waste Technology(JNFCWT)
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• v.11 no.2
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• pp.103-114
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• 2013

The Korea Atomic Energy Research Institute has developed a performance assessment model implementing the A-KRS concept, which was constructed with the GoldSim. In the A-KRS concept, spent nuclear fuel produced from pressurized-water-reactor operations would be pyroprocessed to reduce waste volume and radioactivity. The wastes to be disposed of in a geologic repository are comprised of metal and ceramic waste forms. In this study, results of simulations conducted to establish credibility and build confidence for the A-KRS model are presented. Specifically, release rates and breakthrough times simulated using the A-KRS model were compared to corresponding results from the U.S. NRC SOAR model. In addition, the A-KRS model results were compared to published release rates from the SKB repository performance assessment. This comparison of the A-KRS model results to other independent performance assessments is expected to form part of a suite of model verification and validation activities to provide confidence that the A-KRS model has been implemented appropriately.

• The KIPS Transactions:PartA
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• v.12A no.7 s.97
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• pp.563-570
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• 2005

Hardware and software codesign framework called PeaCE(Ptolemy extension as a Cod sign Environment) allows to express both data flow and control flow. To formally verify an fFSM specification which expresses control flow in PeaCE, the step semantics of the model was defined. In this paper, we introduce the automatic verification tool developed by formal semantics of previous work. This tool uses the SMV as inner model checker md, through our tool, users can formally verify some important bugs such as race condition, ambiguous transition, and circulartransition without directly writing logical formulae.