• Proceedings of the Korean Society of Precision Engineering Conference
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• 2013.05a
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• pp.965-966
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• 2013

• Journal of Korea Multimedia Society
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• v.3 no.1
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• pp.77-90
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• 2000

Real-Time verification is a procedure that verifies the correctness of specification related to requirement in time as well as in logic. One serious problem encountered in the verification task is that the state space grows exponentially owing to the unboundedness of time, which is termed the state space explosion problem. In this paper, we propose a real-time verification technique checking the correctness of specification by showing that a system model described in timed automata is equivalent to the characteristic of system property specified in timed modal-mu calculus. For this, we propose a local model checking method based on the value of the formula in initial state with constructing product graph concerned to only the nodes needed for verification process. Since this method does not search for every state of system model, the state space is reduced drastically so that the proposed method can be applied effectively to real-time system verification.

• Nuclear Engineering and Technology
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• v.46 no.3
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• pp.381-386
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• 2014

A highly reliable safety class controller for NPPs (Nuclear Power Plants) is mandatory as even a minor malfunction can lead to disastrous consequences for people, the environment or the facility. In order to enhance the reliability of a safety class digital controller for NPPs, we employed a diversity approach, in which a PLC-type controller and a PLD-type controller are to be operated in parallel. We built and used structured testbenches based on the classes supported by UVM for functional verification of the PLD-type controller designed for NPPs. We incorporated a UVM register model into the testbenches in order to increase the controllability and the observability of the DUT(Device Under Test). With the increased testability, we could easily verify the datapaths between I/O ports and the register sets of the DUT, otherwise we had to perform black box tests for the datapaths, which is very cumbersome and time consuming. We were also able to perform constrained random verification very easily and systematically. From the study, we confirmed the various advantages of using the UVM register model in verification such as scalability, reusability and interoperability, and set some design guidelines for verification of the NPP controllers.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.755-758
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• 1998

As the performance of microprocessor improves, the design complexity grows exponentially. Therefor, it is very important to make the bug-free model as early as possible in a design life-cycle. This paper describes the simulation-based functional verification methodology for the RTL level description model. It is performed by multi-stage verification methods using extensive hand-generated self-checking tests supplemented with random tests. This approach is opplied to the functional verification of the GPU processor of Raptor and various bugs are detected.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.939-942
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• 2003

Design verification problem is emerging as an important issue to detect any design errors at the early stage of the design. Conventionally, design verifications have been done using a simulation technique. However, this technique has been proved not to cover all potential design errors. Therefore, formal technique is often used to verify digital circuits as an alternative. In this paper we adopted formal verification technique and verified some important properties derived from our pipelined digital systems, using SMV (Symbolic Model Verifier). Our example shows that model checking method (one of formal verification techniques) can be effectively performed in verifying the large digital systems.

• Korean Journal of Fisheries and Aquatic Sciences
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• v.30 no.6
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• pp.964-973
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• 1997

A tidal prism eutrophication model, an one-dimensional intertidal model, is developed to study water quality conditions at small coastal basins and tidal creeks. The model simulates the physical transport processes using the concept of tidal flushing. The concept is simple and straightforward, and thus is ideal for small coastal basins with complex geometry. The model, having twenty-four state variables in the water column, simulates salinity, temperature, dissolved oxygen, three algal groups, and the cycles of carbon, nitrogen, phosphorus and silica. The model is applied to the Lynnhaven Bay, a small coastal basin of Chesapeake Bay in U.S.A. The model is calibrated using the field data collected in 1994, and then is verified using the independently collected data in 1980. The model overall gives a good reproduction of the field data, partly owing to the data collected from the field surveys specifically designed for the model application. This paper presents the procedure, and the results of the model calibration and verification.

• Speech Sciences
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• v.14 no.2
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• pp.127-135
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• 2007

Feature vectors of speech are generally extracted from whole frequency domain. The inherent character of a speaker is located in the low band or high band frequency. However, if the speech is corrupted by narrowband noise with concentrated energy, speaker verification performance is reduced as the individual characteristic is removed. In this paper, we propose a PCA Covariance Model based on the multiband to extract the robust feature vectors against the narrowband noise. First, we divide the overall frequency band into several subbands. Second, the correlation of feature vectors extracted independently from each subband is removed by PCA. The distance obtained from each subband has different distribution. To normalize against the different distribution, we moved the value into the normalized distribution through the mapping function. Finally, the represented value applying the weighting function is used for speaker verification. In the experiments, the proposed method shows better performance of the speaker verification and reduces the computation.

• Journal of Information Technology Services
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• v.10 no.3
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• pp.189-201
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• 2011

Feature models are widely used to model commonalities and variabilities among products during software product line development. Feature configurations are generated by selecting the features to be included in individual products. Automated tools to identify errors or inconsistencies in the feature models and configurations are essential to successful software product line engineering. This paper proposes a verification technique and tool based on semantic web technologies such as OWL, SWRL and Protege API. This approach checks the feature model and configuration based on predefined rules and provides information on existence of errors as well as the kinds of those errors. This approach is extensible due to ease of rule modification and may be easily applied to other environments because semantic web technologies can be easily integrated with other programming environments. This paper demonstrates how various semantic web-related technologies can support automatic verification of one kind of software development artifact, the feature model.

• Journal of Biosystems Engineering
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• v.23 no.6
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• pp.549-560
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• 1998

The dynamic model of a tractor-trailer system developed in the first part of this paper was verified in this article by comparing the simulated acceleration responses of the system with actually measured ones. A commercially available tractor and a trailer were used for the verification test. Values of the model parameters were measured or theoretically derived if the measurement was practically impossible. The tractor-trailer system was operated with different forward speeds over three equally spaced half-sine bumps on the flat concrete surface. Results of the verification tests showed that autospectra of the measured and simulated accelerations of the tractor-trailer system agreed well up to the frequencies slightly feater than the fundamental frequencies of the ground excitations and at the frequencies of engine excitations. The mean of normalized errors of the simulated responses to the measured ones was estimated to be less than 10% for all the test runs. The peak responses in the autospectra also coincided well both in the frequency and magnitude.

• Proceedings of the Korea Society for Simulation Conference
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• 2005.05a
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• pp.100-105
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• 2005

Development of complex discrete event simulators requires cooperation between domain experts and modeling experts who involve the development. With the cooperation the domain experts derive user requirement and modeling experts transform the requirement to a simulation model. This paper proposes a method for consistency verification of simulation model in DEVS formalism against the user requirement in UML diagrams. It also presents an automated tool, called VeriDEVS, which implements the proposed method. Inputs of VeriDEVS are three UML diagrams, namely use case, class and sequence diagrams, and DEVS Graph, all in Visio; outputs of a verification result is represented in PowerPoint files.