• Pediatric Gastroenterology, Hepatology & Nutrition
• /
• v.4 no.2
• /
• pp.191-198
• /
• 2001

Purpose: This study was undertaken to investigate the seroepidemiologic pattern of Helicobacter pylori (H. pylori) and hepatitis A virus (HAV) infections in children. Methods: A total of 315 serum samples were obtained from healthy children, living in Gwangju and Chonnam area. All serum samples were assayed for H. pylori IgG level using enzyme immunoassay techniques. HAV IgG level in serum were tested by a competitive radio-immunoassay in 215 subjects. The age-specific seroprevalence of H. pylori and HAV was separately analysed. The concordance of seropositivity and seronegativity between H. pylori and HAV infection was examined by the kappa statistic analysis. Results: Seropositivity was found in 17.5% (55/315) and 30.2% (65/215) of the subjects for H. pylori and HAV, respectively. Cross-tabulation of these data showed that 21 subjects (9.8%) were seropositive and 135 (62.8%) were seronegative for both H. pylori and HAV, 15 (7.0%) were seropositive for only H. pylori and 44 (20.5%) for only HAV. The seroprevalence of H. pylori and HAV increased significantly with age. There was a slight agreement between H. pylori and HAV seropositivity (${\kappa}$=0.26). Conclusion: This study shows a slight similarity in the concordance of seropositivity and seronegativity between H. pylori and HAV infection and provides evidence that H. pylori and HAV may share a common mode of transmission.

• Journal of Korean Society of Transportation
• /
• v.33 no.4
• /
• pp.379-392
• /
• 2015

Freight flow data in Korea has been collected for a variety of purposes by various organizations. However, since the representation and format of the data varies, it has not been substantially used for freight analyses and furthermore for freight policies. In order to increase the applicability of those data sets, it is required to bring them in a table and compare for finding the differences. Then, it is shown that the raw data can be aggregated by a particular criterion such as mode, origin and destination, and type commodity. This study aims to examine the freight data issue in terms of three different points of view. First, we investigated various freight volume data sets which are released by several organizations. Second, we tried to develop formulations for freight volume data. Third, we discussed how to apply the formulations to network models in which particular OR (Operations Research) techniques are used. The results emphasized that some data might be useless for modeling once they are aggregated. As a result of examining the freight volume data, this study found that 14 organizations share their data sets at various aggregation levels. This study is not an ordinary research article, which normally includes data analysis, because it seems to be impossible to conduct extensive case studies. The reason is that the data dealt in this study are diverse. Nevertheless, this study might guide the research direction in the freight transport research society in terms of data issue. Especially, it can be concluded that this study is a timely research because the governmemt has emphasized the importance of sharing data to public throughout 'government 3.0' for research purpose.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.47 no.2
• /
• pp.21-31
• /
• 2010

This paper presents a design of PLL and SSCG for reducing the EMI effect at the electronic machinery and tools for DisplayPort application. This system is composed of the essential element of PLL and Charge-Pump2 and Reference Clock Divider to implement the SSCG operation. In this paper, 270MHz/162MHz dual-mode PLL that can provide 10-phase and 1.35GHz/810MHz PLL that can reduce the jitter are designed for 2.7Gbps/162Gbps DisplayPort application. The jitter can be reduced drastically by combining 270MHz/162MHz PLL with 2-stage 5 to 1 serializer and 1.35GHz PLL with 2 to 1 serializer. This paper propose the frequency divider topology which can share the divider between modes and guarantee the 50% duty ratio. And, the output current mismatch can be reduced by using the proposed charge-pump topology. It is implemented using 0.13 um CMOS process and die areas of 270MHz/162MHz PLL and 1.35GHz/810MHz PLL are $650um\;{\times}\;500um$ and $600um\;{\times}\;500um$, respectively. The VCO tuning range of 270 MHz/162 MHz PLL is 330 MHz and the phase noise is -114 dBc/Hz at 1 MHz offset. The measured SSCG down spread amplitude is 0.5% and modulation frequency is 31kHz. The total power consumption is 48mW.