• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2005.05a
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• pp.139-145
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• 2005

In the study, in order to deposit TaN thin film using diffusion barrier and bottom electrode we made the Plasma Assisted ALD equipment and confirmed the electrical characteristic of TaN thin films deposited PAALD method, PAALD equipment depositing TaN thin film using PEMAT(pentakis(ethylmethlyamlno) tantalum) Precursor and $NH_3$ reaction gas is aware that TaN thin film deposited of high density and amorphous phase with XRD measurement The degree of diffusion and react ion taking place in Cu/TaN(deposited using 150 W PAALD)/$SiO_2$/Si systems with increasing annealing temperature was estimated from MOS capacitor property and the $SiO_2(600\;\AA)$/Si system surface analysis by C-V measurement and secondary ion material spectrometer(SIMS) after Cu/TaN/$SiO_2(400\;\AA)$ system etching. TaN thin film deposited PAALD method diffusion barrier have a good diffusion barrier property up to $500^{\circ}C$.

• Journal of the Semiconductor & Display Technology
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• v.4 no.2 s.11
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• pp.39-43
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• 2005

In the study, in order to deposit TaN thin film for diffusion barrier and bottom electrode we made the Plasma Assisted ALD equipment and confirmed the electrical characteristics of TaN thin films grown PAALD method. Plasma Assisted ALD equipment depositing TaN thin film using PEMAT(pentakis(ethylmethlyamino) tantalum) precursor and NH3 reaction gas is shown that TaN thin film deposited high density and amorphous phase with XRD measurement. The degree of diffusion and reaction taking place in Cu/TaN (deposited using 150W PAALD)/$SiO_{2}$/Si systems with increasing annealing temperature was estimated for MOS capacitor property and the $SiO_{2}$, (600${\AA}$)/Si system surface analysis by C-V measurement and secondary ion material spectrometer (SIMS) after Cu/TaN/$SiO_{2}$ (400 ${\AA}$) layer etching. TaN thin film deposited PAALD method diffusion barrier have a good diffusion barrier property up to 500$^{\circ}C$.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.303.2-303.2
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• 2014

The oxides of group IV transition metals such as titanium, zirconium, hafnium have many important current and future application, including protective coatings, sensors and dielectric layers in thin film electroluminescent (TFEL) devices. Recently, group IV transition metal oxide films have been intensively investigated as replacements for SiO2. Due to high permittivities (k~14-25) compared with SiO2 (k~3.9), large band-gaps, large band offsets and high thermodynamic stability on silicon. Herein, we report the synthesis of new group IV transition metal complexes as useful precursors to deposit their oxide thin films using chemical vapor deposition technique. The complexes were characterized by FT-IR, 1H NMR, 13C NMR and thermogravimetric analysis (TGA). Newly synthesised compounds show high volatility and thermal stability, so we are trying to deposit metal oxide thin films using the complexes by Atomic Layer Deposition (ALD).

• Journal of the Korean institute of surface engineering
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• v.43 no.6
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• pp.266-271
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• 2010

Ternary Mo-Cu-N films were deposited on Si wafer substrates with various copper contents by magnetron sputtering method using Mo target and Cu target in $Ar/N_2$ gaseous atmosphere. As increasing $N_2$ pressure, the microstructure of Mo-N films changed from ${\gamma}-Mo_2N$ of (111) having face-centered-cubic (FCC) structure to $\delta$-MoN of (200) having hexagonal structure. Detailed the microstructures of the Mo-Cu-N coatings were studied by X-ray diffraction, scanning electron microscopy and field emission transmission electron microscope. The results indicated that the incorporation of copper into the growing Mo-N coating led to the $Mo_2N$ and MoN crystallites were more well-distributed and refined and the copper existed in grain boundary. Ternary Mo-Cu-N films had a composite microstructure of the nanosized crystal crystalline ${\gamma}-Mo_2N$ and $\delta$-MoN surrounded by amorphous $Cu_3N$ phase.

• Journal of the Korean Institute of Telematics and Electronics
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• v.22 no.4
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• pp.76-83
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• 1985

Mo2N/Mo double layer which is to be used for gate of the RMOS (refractory metal oxide semiconductor) and interconnection material has been formed by means of low temperature r.f. reactive sputtering in Ar and N2 mixture. The sheet .esistance of 1 000$\AA$Mo2 N/4000$\AA$Mofilm was about 1.20-1.28 ohms/square, which is about an order of magnitude lower than that of polysilicon film. The workfunction difference naE between MO2N/MO layer and (100) p-Si with 6-9 ohm'cm resistivity obtained from C-V plots was about -0.30ev, and the fixed charge density Qss/q in the oxide was about 2. Ix1011/cm2. To evaluate the signal transfer delay time per inverter stage, an integrated ring oscillator circuit consisting of 45-stage inverters was fabricated using the polysilicon gate NMOS process. The signal transfer delay time per inverter stage obtained in this experiment was about 0.8 nsec

• Proceedings of the Korean Magnestics Society Conference
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• 2008.12a
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• pp.289.1-289.1
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• 2008

• Korean Journal of Materials Research
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• v.13 no.3
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• pp.150-154
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• 2003

Amorphous carbon nitride films were deposited on Si(001) substrates by a plasma enhanced chemical vapor deposition technique (PECVD) using $CH_4$and $N_2$as reaction gases. The growth and film properties were investigated while the gas ratio and the working pressure were changed systematically. At 1 Torr working pressure, an increase in the $N_2$partial pressure results in a significant increase of the deposition rate as well as an apparent presence of C ≡N bonding, while little affecting the microstructure and amorphus nature of the films. In the case of changing the working pressure at a fixed $N_2$partial pressure of 98%, a film grown at a medium pressure of $1${\times}$10^{-2}$ Torr shows the most prominent C=N bonding nature and photoluminescent property.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.205-207
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• 2008

The new process for hybrid silicon thin film transistor (TFT) using DPSS laser has been developed for realizing both low-temperature poly-Si (LTPS) TFT and a-Si:H TFT on the same substrate as a backplane of active matrix liquid crystal display. LTPS TFTs are integrated on the peripheral area of the panel for gate driver integrated circuit and a-Si:H TFTs are used as a switching device for pixel in the active area. The technology has been developed based on the current a-Si:H TFT fabrication process without introducing ion-doping and activation process and the field effect mobility of $4{\sim}5\;cm^2/V{\cdot}s$ and $0.5\;cm^2/V{\cdot}s$ for each TFT was obtained. The low power consumption, high reliability, and low photosensitivity are realized compared with amorphous silicon gate driver circuit and are demonstrated on the 14.1 inch WXGA+ ($1440{\times}900$) LCD Panel.

• Bulletin of the Korean Chemical Society
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• v.23 no.2
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• pp.225-228
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• 2002

Amorphous $Ga_2O_3$ films have been grown on Si(100) substrates by metal organic chemical vapor deposition (MOCVD) using gallium isopropoxide, $Ga(O^iPr)_3$, as single precursor. Deposition was carried out in the substrate temperature range 400-800 $^{\circ}C$. X-ray photoelectron spectroscopy (XPS) analysis revealed deposition of stoichiometric $Ga_2O_3$ thin films at 500-600 $^{\circ}C$. XPS depth profiling by $Ar^+$ ion sputtering indicated that carbon contamination exists mostly in the surface region with less than 3.5% content in the film. Microscopic images of the films by scanning electron microscopy (SEM) and atomic force microscopy (AFM) showed formation of grains of approximately 20-40 nm in size on the film surfaces. The root-mean-square surface roughness from an AFM image was ${\sim}10{\AA}$. The interfacial layer of the $Ga_2O_3$/Si was measured to be ${\sim}35{\AA}$ thick by cross-sectional transmission electron microscopy (TEM). From the analysis of gaseous products of the CVD reaction by gas chromatography-mass spectrometry (GC-MS), an effort was made to explain the CVD mechanism.

• Proceedings of the Korean Vacuum Society Conference
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• 1999.07a
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• pp.163-163
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• 1999

MOSFET, MESFET 그리고 MODFET는 Logic ULSIs, high speed ICs, RF MMICs 등에서 중요한 역할을 하고 있으며, 그것의 gate electrode, contact, interconnect 등의 물질로는 refractory metal을 이용한 CoSi2, MoSi2, TaSi2, PtSi2, TiSi2 등의 효과를 얻어내고 있다. 그중 TiSi2는 비저항이 가장 낮고, 열적 안정도가 좋으며 SAG process가 가능하므로 simpler alignment process, higher transconductance, lower source resistance 등의 장점을 동시에 만족시키고 있다. 최근 소자차원이 scale down 됨에 따라 TiSi2의 silicidation 과정에서 C49 TiSi2 phase(high resistivity, thermally unstable phase, larger grain size, base centered orthorhombic structure)의 출현과 그것을 제거하기 위한 노력이 큰 issue로 떠오르고 있다. 여러 연구 결과에 따르면 PAI(Pre-amorphization zimplantation), HTS(High Temperature Sputtering) process, Mo(Molybedenum) implasntation 등이 C49를 bypass시키고 C54 TiSi2 phase(lowest resistivity, thermally stable phase, smaller grain size, face centered orthorhombic structure)로의 transformation temperature를 줄일 수 있는 가장 효과적인 방법으로 제안되고 있지만, 아직 그 문제가 완전히 해결되지 않은 상태이며 C54 nucleation에 대한 physical mechanism을 밝히진 못하고 있다. 본 연구에서는 증착 시 기판온도의 변화(400~75$0^{\circ}C$)에 따라 silicon 위에 DC/RF magnetron sputtering 방식으로 Ti/Si film을 각각 제작하였다. 제작된 시료는 N2 분위기에서 30~120초 동안 500~85$0^{\circ}C$의 온도변화에 따라 RTA법으로 각각 one step annealing 하였다. 또한 Al을 cosputtering함으로써 Al impurity의 존재에 따른 영향을 동시에 고려해 보았다. 제작된 시료의 분석을 위해 phase transformation을 XRD로, microstructure를 TEM으로, surface topography는 SEM으로, surface microroughness는 AFM으로 측정하였으며 sheet resistance는 4-point probe로 측정하였다. 분석된 결과를 보면, 고온에서 제작된 박막에서의 C54 phase transformation temperature가 감소하는 것이 관측되었으며, Al impuritydmlwhswork 낮은온도에서의 C54 TiSi2 형성을 돕는다는 것을 알 수 있었다. 본 연구에서는 결론적으로, 고온에서 증착된 박막으로부터 열적으로 안정된 phase의 낮은 resistivity를 갖는 C54 TiSi2 형성을 보다 낮은 온도에서 one-step RTA를 통해 얻을 수 있다는 결과와 Al impurity가 존재함으로써 얻어지는 thermal budget의 효과, 그리고 그로부터 기대할 수 있는 여러 장점들을 보고하고자 한다.