• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.809-812
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• 1992

Charateristics of the ECR etch were Investigated about $MoSi_2$ layer which is widely used for the capping layer and barrier layer in VLSI metallization. The etch rate was evaluated according to gas ratio of $SF_6/BCl_3$, $N_2$ flow rate, RF power and chamber pressure. The chamber pressure, the most important factor, represented the maximum etch rate at about the pressure of 10 mTorr.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.438-439
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• 2013

Microelectronic devices의 접촉저항의 향상을 위해 Metal silicides의 형성 mechanism과 전기적 특성에 대한 연구가 많이 이루어지고 있다. 지난 수십년에 걸쳐, Ti silicide, Co silicide, Ni silicide 등에 대한 개발이 이루어져 왔으나, 계속적인 저저항 접촉 소재에 대한 요구에 의해 최근에는 Rare earth silicide에 관한 연구가 시작되고 있다. Rare-earth silicide는 저온에서 silicides를 형성하고, n-type Si과 낮은 schottky barrier contact (~0.3 eV)를 이룬다. 또한, 비교적 낮은 resistivity와 hexagonal AlB2 crystal structure에 의해 Si과 좋은 lattice match를 가져 Si wafer에서 high quality silicide thin film을 성장시킬 수 있다. Rare earth silicides 중에서 ytterbium silicide는 가장 낮은 electric work function을 갖고 있어 낮은 schottky barrier 응용에서 쓰이고 있다. 이로 인해, n-channel schottky barrier MOSFETs의 source/drain으로써 주목받고 있다. 특히 ytterbium과 molybdenum co-deposition을 하여 증착할 경우 thin film 형성에 있어 안정적인 morphology를 나타낸다. 또한, ytterbium silicide와 마찬가지로 낮은 면저항과 electric work function을 갖는다. 그러나 ytterbium silicide에 molybdenum을 화합물로써 높은 농도로 포함할 경우 높은 schottky barrier를 형성하고 epitaxial growth를 방해하여 silicide film의 quality 저하를 야기할 수 있다. 본 연구에서는 ytterbium과 molybdenum의 co-deposition에 따른 silicide 형성과 전기적 특성 변화에 대한 자세한 분석을 TEM, 4-probe point 등의 다양한 분석 도구를 이용하여 진행하였다. Ytterbium과 molybdenum을 co-deposition하기 위하여 기판으로 $1{\sim}0{\Omega}{\cdot}cm$의 비저항을 갖는 low doped n-type Si (100) bulk wafer를 사용하였다. Native oxide layer를 제거하기 위해 1%의 hydrofluoric (HF) acid solution에 wafer를 세정하였다. 그리고 고진공에서 RF sputtering 법을 이용하여 Ytterbium과 molybdenum을 동시에 증착하였다. RE metal의 경우 oxygen과 높은 반응성을 가지므로 oxidation을 막기 위해 그 위에 capping layer로 100 nm 두께의 TiN을 증착하였다. 증착 후, 진공 분위기에서 rapid thermal anneal(RTA)을 이용하여 $300{\sim}700^{\circ}C$에서 각각 1분간 열처리하여 ytterbium silicides를 형성하였다. 전기적 특성 평가를 위한 sheet resistance 측정은 4-point probe를 사용하였고, Mo doped ytterbium silicide와 Si interface의 atomic scale의 미세 구조를 통한 Mo doped ytterbium silicide의 형성 mechanism 분석을 위하여 trasmission electron microscopy (JEM-2100F)를 이용하였다.

• Bulletin of the Korean Chemical Society
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• v.24 no.7
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• pp.953-956
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• 2003

Hexagonal GaN (h-GaN) films have been grown on Si(111) substrates by metal organic chemical vapor deposition using the azidodiethylgallium methylamine adduct, Et₂Ga(N₃)·NH₂Me, as a new single precursor. Deposition was carried out in the substrate temperature range 385-650 °C. The GaN films obtained were stoichiometric and did not contain any appreciable amounts of carbon impurities. It was also found that the GaN films deposited on Si(111) had the [0001] preferred orientation. The photoluminescence spectrum of a GaN film showed a band edge emission peak characteristic of h-GaN at 378 nm.

• Korean Journal of Materials Research
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• v.18 no.9
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• pp.507-510
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• 2008

Electrical properties of multi-channel metal-induced unilaterally precrystallized polycrystalline silicon thin-film transistor (MIUP poly-Si TFT) devices and circuits were investigated. Although their structure was integrated into small area, reducing annealing process time for fuller crystallization than that of conventional crystal filtered MIUP poly-Si TFTs, the multi-channel MIUP poly-Si TFTs showed the effect of crystal filtering. The multi-channel MIUP poly-Si TFTs showed a higher carrier mobility of more than 1.5 times that of the conventional MIUP poly-Si TFTs. Moreover, PMOS inverters consisting of the multi-channel MIUP poly-Si TFTs showed high dynamic performance compared with inverters consisting of the conventional MIUP poly-Si TFTs.

• Journal of the Semiconductor & Display Technology
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• v.2 no.4
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• pp.31-35
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• 2003

We present a formation technique of thin film heater for heat transfer components. Thin film structures of Cr-Si have been prepared on top of alumina substrates by magnetron sputtering. More samples of Mo thin films were prepared on silicon oxide and silicon nitride substrates by electron beam evaporation technology. The electrical properties of the thin film structures were measured up to the temperature of $500^{\circ}C$. The thickness of the thin films was ranged to about 1 um, and a post annealing up to $900^{\circ}C$ was carried out to achieve more reliable film structures. In measurements of temperature coefficient of resistance (TCR), chrome-rich films show the metallic properties; whereas silicon-rich films do the semiconductor properties. Optimal composition between Cr and Si was obtained as 1 : 2, and there is 20% change or less of surface resistance from room temperature to $500^{\circ}C$. Scanning electron microscopy (SEM) and Auger electron spectroscopy (AES) were used for the material analysis of the thin films.

• Journal of the Korean Magnetics Society
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• v.17 no.1
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• pp.22-25
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• 2007

In this research, magnetic properties of spin valve structures using IrMn layers as antiferromagnetic were studied depending on the thickness of the pinned layer. The spin valve structure was Si substrate/$SiO_2(2,000\;{\AA})/Mo(17\;{\AA})NiFe(21\;{\AA})/CoFe(28\;{\AA})/Cu(22\;{\AA})/CoFe(18\;{\AA})/IrMn(t\;{\AA})/Ta(25\;{\AA})$. Also, Mo film was deposited on Si substrates and the thermal annealing effect was analyzed. The resistivity of the Mo film was increased as an annealing temperature was increased up to $600^{\circ}C$. The variations of MR ratio were related with magnetic exchange coupling field of the spin valve structures for various IrMn pinned layer thickness up to 130 ${\AA}$. MR ratio and $H_{ex}$ of spin valves was about 9.05% and 277.5 Oe when the thickness of the IrMn pinned layer was $32.5\;{\AA}(t=32.5\;{\AA})$. It was increased to 9.65% and 337.5 Oe for $t=65\;{\AA}$. For $t=97.5\;{\AA}$, the MR ratio and Hex decreased to 8.2% and 285 Oe, and further decrease was observed up to $t=130\;{\AA}$.

• Proceedings of the Korean Ceranic Society Conference
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• 2002.10a
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• pp.98.1-98
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• 2002

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.277.1-277.1
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• 2016

We report on synthesis of large-area MoS2 using chemical vapor deposition (CVD). Relatively uniform MoS2 are obtained. To fabricate field-effect transistor (FET) devices, MoS2 films are transferred to another SiO2/Si substrate using polystyrene (PS) and patterned using oxygen plasma. In addition, to reduce contact resistance, synthesis of graphene used as channel. Device characteristics are presented and compared with the reported results.

• 한국전자현미경학회:학술대회논문집
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• 2001.05a
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• pp.46-47
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• 2001

• Journal of the Korean Magnetics Society
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• v.17 no.2
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• pp.95-98
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• 2007

In this paper, the magnetic properties and the annealing behavior of spin valve structures with Mo(MoN) underlayers were studied for various underlayer thickness. The spin valve structure was Si substrate/Mo(MoN)$(t{\AA})/NiFe(21{\AA})/CoFe(28{\AA})/Cu(22{\AA})/CoFe(18{\AA})/IrMn(65{\AA})/Ta(25 {\AA})$. Mo and MoN films were deposited on Si substrates and their thermal annealing behavior was analyzed. The deposition rate of the MoN thin film was decreased and tile resistivity of the MoN thin films were increased as the $N_2$ gas flow was increased. The variations of MR ratio and magnetic exchange coupling field of spin valve structure were smaller with MoN underlayers than that with Mo underlayers up to thickness of $51{\AA}$. MR ratio of spin valves with Mo underlayers was 2.86% at room temperature and increased up to 2.91 % after annealing at $200^{\circ}C$. Upon annealing at $300^{\circ}C$, the MR ratio decreased about 2.16%. The MR ratio of spin valves structure with MoN underlayers for $N_2$ gas flow 1 sccm was 5.27% at room temperature and increased up to 5.56% after annealing at $200^{\circ}C$. Upon annealing at $300^{\circ}C$, the MR ratio decreased about 4.9%.