• Journal of Power Electronics
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• v.14 no.3
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• pp.519-530
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• 2014

A novel simplified pulse width modulation(PWM) strategy for neutral point clamped (NPC) three-level converter is proposed in this paper.The direct output voltage modulation is applied to reduce the calculation time. Based on this strategy, several optimized control methods are proposed. The neutral point potential balancing algorithm is discussed and a fine neutral point potential balancing scheme is introduced. Moreover, the minimum pulse width compensation and switching losses reduction can be easily achieved using this modulation strategy. This strategy also gains good results even with the unequal DC link capacitor. The modulation principle is studied in detail and the validity of this simplified PWM strategy is experimentally verified in this paper. The experiment results indicated that the proposed PWM strategy has excellent performance, and the neutral point potential can be balanced well with unequal DC link captaincies.

• Journal of Digital Contents Society
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• v.19 no.8
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• pp.1603-1615
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• 2018

In order to achieve the low complexity and area, power in the design of Optical Image Stabilization (OIS) suitable for the smart phone, this paper presents the following design explorations, such as; optimization of gyroscope sampling rate, simple and accurate gyroscope filters, and reduced operating frequency of motion compensation, optimized bit width in ADC and DAC, evaluation of noise effects due to PWM driving. In experiments of gyroscope sampling frequencies, it is found that error values are unvaried in the frequency above 5KHz. The gyroscope filter is efficiently designed by combining the Fuzzy algorithm, to illustrate the reasonable compensation for the angle and phase errors. Further, in the PWM design, the power consumption of 2MHz driving is shown to decrease up to 50% with respect to the linear driving, and the imaging noises are reduced in the driving frequency above 2MHz driving frequency. The operating frequency could be reduced to 5KHz in controller and 10KHz in driver, respectively, in the motion compensation. For ADC and DAC, the optimized exploration experiments verify the minimum bit width of 11bits in ADC as well as 10bits in DAC without the performance degradation.

• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.3
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• pp.292-298
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• 2003

Most of the three phase inverters for adjustable speed drive of AC machines are equipped with two or three current sensors for measurement of three phase current. One method to reduce the number of current sensors is that single current sensor measures the DC link current, then three phase current is reconstructed using the measured value and the switching status. To improve the measurement accuracy, switching state should be maintained for more than minimum switching time. Many papers have been published, which focused on the readjustment of pulse width and compensation of voltage distortion. Those methods are suitable for space vector modulation. But there are some difficulties in applying these methods to carrier-based PWM which is widely used in industry. In this paper, new current measurement method and voltage compensation method are proposed which are suitable for carrier-based PWM, then, the validity of proposed method is confirmed through experiment.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.7
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• pp.1191-1202
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• 1994

We numerically investigate a stable propagation regime of soliton pulse trains in fibers with periodically copensated loss by lumped optical amplifiers. When amplification solition pulses is 1.2~1.5 and the minimum soliton separation normalized by the soliton width becomes about 6. In cases of L=50[km], the allowable range of A is 1.5~1.7 under =6. The maximum allowable variation of the loss compensation in each lumped amplifier becomes +-2% of the fiber loss when L=50[km], A=1.6, and =6. Generally, the allowable rages of the soliton amplitude A and amplifier gain are inversely proportional to the amplification period L.

• Journal of IKEEE
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• v.24 no.1
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• pp.319-325
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• 2020

In this paper, a discontinuous-conduction mode (DCM) DC-DC buck converter is presented for mobile device applications. The buck converter consists of compensator for stable operations, pulse-width modulation (PWM) logic, and power switches. In order to achieve small hardware form-factor, the number of off-chip components should be kept to be minimum, which can be realized with simple and efficient frequency compensation and digital soft start-up circuits. Burst-mode operation is included for preventing the efficiency from degrading under very light load condition. The DCM DC-DC buck converter is fabricated with 0.18-um BCDMOS process. Programmable output with external resistors is typically set to be 1.8V for the input voltage between 2.8 and 5.0V. With a switching frequency of 1MHz, measured maximum efficiency is 92.6% for a load current of 100mA.