• Title/Summary/Keyword: Microprocessor

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A Study on a Internet Remote Control and Monitoring System using a Microprocessor Embedded Controller (마이크로프로세서를 이용한 인터넷 원격감시제어 시스템에 관한 연구)

  • 서인호;유영호
    • Journal of Advanced Marine Engineering and Technology
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    • v.25 no.4
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    • pp.869-879
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    • 2001
  • Serial communications such as RS-232C or RS-485 have been used to control and monitor the industrial plants for a long in cooperating with a computer or microprocessor. In recent years a great deal of effort has been made to achieve these control and monitoring through Internet network. This paper proposes a microprocessor system to implement remote control and monitoring system through Internet network. The proposed system uses NE2000 compatible NIC for data link and physical layer to access Internet network The microprocessor employed in the system plays a role of interfacing NE2000 compatible NIC interpreting protocols above link layer, controlling and monitoring industrial plants simultaneously. This paper also shows MMI and experimental results which control and monitor two power plants on the computer monitor with a mouse remotely to verify the proposed.

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Design of the Sequential Controller of Warehousing-Delivery and Unmanned Transportation System for Automated Warehouse System by Microprocessor (Microprocessor에 의한 자동창고의 입출고 및 반송 시스템의 Sequential controller 설계)

  • Park, Jong Won;Choi, Sung Yong;Woo, Kwang Jun
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.24 no.2
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    • pp.292-300
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    • 1987
  • This paper, realizes the design of the sequential controller of a reinforced warehousing-delivery and unmanned transportation system for automated warehouse system. The system is composed of ware housing delivery adn transportation system using two unmanned vehicles with hierachical structure. It is described by GRAFCET and realized by programmed logic with microprocessor. Being described by GRAFCET, the system is able to divide it into subsystems and to synchronize them. Defining the concept of program module, one can easily program the system with the microprocessor instruction language.

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The Future of Microprocessor: GHz, SMT and Code Morphing (마이크로프로세서의 미래)

  • 박성배
    • Journal of the Korean Professional Engineers Association
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    • v.33 no.4
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    • pp.53-58
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    • 2000
  • Within 10years, it will be possible to integrate 10B transistors on a single chip microprocessor which wilt operate far beyond GHZ, and it will execute about 20-200 instructions per clock cycle from widely variable instruction streams leveraging SMT(Simultaneous Multithreading) technology . Also it will decouple the current legacy X86 binary compatibility by translation layer such as code morphing technology.

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자동화기기용 Embedded System Software의 개발동향

  • 임동진
    • 전기의세계
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    • v.41 no.5
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    • pp.14-19
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    • 1992
  • Microprocessor의 성능은 향상되는 반면 관련 hardware의 가격은 계속 하락하고 있다. 따라서 자동화 기기와 같은 특수기기내에서 microprocessor관련 hareware의 비용이 전체기기의 가격에서 차지하는 비중이 점차로 줄어들고 있고 이와 같은 기기류에 32bit microporcessor와 같은 고성능의 hardware를 장착하는 경우가 늘고 있다. 그러나 이에 걸맞는 software의 제작은 결코 쉬운 일이 아니다. 이와같은 고성능의 기기에 필요한 적절한 software의 제작 및 유지보수를 위해서는 반드시 적절한 개발환경이 필수적이라고 할 수 있다.

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The Design of 32 Bit Microprocessor for Sequence Control Using FPGA (FPGA를 이용한 시퀀스 제어용 32비트 마이크로프로세서 설계)

  • Yang, Oh
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.6
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    • pp.431-441
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    • 2003
  • This paper presents the design of 32 bit microprocessor for a sequence control using a field programmable gate array(FPGA). The microprocessor was designed by a VHDL with top down method, the program memory was separated from the data memory for high speed execution of sequence instructions. Therefore it was possible that sequence instructions could be operated at the same time during the instruction fetch cycle. In order to reduce the instruction decoding time and the interface time of the data memory interface, an instruction code size was implemented by 32 bits. And the real time debug operation was implemented for easeful debugging the designed processor with a single step run, PC break point run, data memory break point run. Also in this designed microprocessor, pulse instructions, step controllers, master controllers, BM and BCD type arithmetic instructions, barrel shift instructions were implemented for sequence logic control. The FPGA was synthesized under a Xilinx's Foundation 4.2i Project Manager using a V600EHQ240 which contains 600,000 gates. Finally simulation and experiment were successfully performed respectively. For showing good performance, the designed microprocessor for the sequence logic control was compared with the H8S/2148 microprocessor which contained many bit instructions for sequence logic control. The designed processor for the sequence logic showed good performance.

A Study in the Effects of DRAM on The Microprocessor Performance (마이크로프로세서의 성능에 끼치는 DRAM의 영향에 관한 연구)

  • Lee, Jongbok
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.17 no.1
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    • pp.219-224
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    • 2017
  • Recently, the importance of DRAM is very significant not only in embedded systems and mobile devices but also in high-end modern microprocessors and multicore processors. To keep up with this, both industry and academia have actively studied various types of future DRAMs. Therefore, accurate DRAM model is requisite when evaluating the microprocessor performance. In this paper, a microprocessor trace-driven simulator which can couple with the cycle-accurate DRAM simulator has been developed. Using SPEC 2000 benchmarks as input, the effect of cycle-accurate DDR3 model on the microprocessor performance has been evaluated.

A Design of 16-bit Adiabatic Low-Power Microprocessor (단열회로를 이용한 16-bit 저전력 마이크로프로세서의 설계)

  • Shin, Young-Joon;Lee, Byung-Hoon;Lee, Chan-Ho;Moon, Yong
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.40 no.6
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    • pp.31-38
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    • 2003
  • A 16-bit adiabatic low-power Microprocessor is designed. The processor consists of control block, multi-port register file, program counter, and ALU. An efficient four-phase clock generator is also designed to provide power clocks for adiabatic processor. Adiabatic circuits based on efficient charge recovery logic(ECRL), are designed 0.35,${\mu}{\textrm}{m}$ CMOS technology. Conventional CMOS processor is also designed to compare the energy consumption of microprocessors. Simulation results show that the power consumption of the adiabatic microprocessor is reduced by a factor of 2.9∼3.1 compared to that of conventional CMOS microprocessor.

CAN Based Networked Intelligent Multi-Motor Control System using DSP2812 Microprocessor (DSP2812 마이크로프로세서를 이용한 복수전동기운전을 위한 CAN기반 지능형제어시스템 개발)

  • Kim, Jung-Gon;Hong, Won-Pyo
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2005.11a
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    • pp.81-87
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    • 2005
  • This paper addresses the CAN based networked intelligent multi-motor control system using DSP2812 microprocessor. CAN built in DSP2812 microprocessor is used to control and monitor the multi-motor system with the inverter driving system. CAN network implementation schemes and the algorithm for multi-motor control and monitoring is also developed. We configure the multi-motor control experimental system to verify the proposed algorithm and the reliability of CAN networks system in the various operation of two induction motors. The experimental results show that CAN based networked intelligent multi-motor control system using DSP2812 microprocessor can carry out the real-time network based control in various speed range and the position control of induction motors.

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