• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.57 no.10
• /
• pp.1812-1817
• /
• 2008

A cooling system for microelectronics is becoming more important as its surface heat density is projected to reach that of the sun surface. The existing technologies using natural and forced convection are limited to solve the problems. Recently, an electrohydrodynamic driven flow is studied as one of the means to cope with this problems. A new method, utilizing a needle-centered nozzle electrode, has been proposed and investigated. The I-V characteristics of the nozzle electrode for deionized water and silicone oil were significantly different from that of without liquid, which might be due to the liquid drop covered on the nozzle tip by the EHD force acting near the needle tip. Results showed that the liquid pumping rate and flow efficiency of the nozzle electrode were very high, especially for the silicone oil. Theoretical analysis also showed the effectiveness of the needle electrode centered in the ceramic nozzle, which, however, can be a means as a liquid pump.

• Journal of the Microelectronics and Packaging Society
• /
• v.12 no.4 s.37
• /
• pp.331-338
• /
• 2005

The rapid advances in high power light sources and arrays as encountered in incandescent lamps have induced dramatic increases in die heat flux and power consumption at all levels of high power LED packaging. The lifetime of such devices and device arrays is determined by their temperature and thermal transients controlled by the powering and cooling, because they are usually operated under rough environmental conditions. The reliability of packaged electronics strongly depends on the die attach quality, because any void or a small delamination may cause instant temperature increase in the die, leading sooner or later to failure in the operation. Die attach materials have a key role in the thermal management of high power LED packages by providing the low thermal resistance between the heat generating LED chips and the heat dissipating heat slug. In this paper, thermal transient characteristics of die attach in high power LED package have been studied based on the thermal transient analysis using the evaluation of the structure function of the heat flow path. With high power LED packages fabricated by die attach materials such as Ag paste, solder paste and Au/Sn eutectic bonding, we have demonstrated characteristics such as cross-section analysis, shear test and visual inspection after shear test of die attach and how to detect die attach failures and to measure thermal resistance values of die attach in high power LED package. From the structure function oi the thermal transient characteristics, we could know the result that die attach quality of Au/Sn eutectic bonding presented the thermal resistance of about 3.5K/W. It was much better than those of Ag paste and solder paste presented the thermal resistance of about 11.5${\~}$14.2K/W and 4.4${\~}$4.6K/W, respectively.

• Journal of the Microelectronics and Packaging Society
• /
• v.24 no.2
• /
• pp.17-21
• /
• 2017

Horizontal thin-film thermoelectric cooler has been simulated using a commercial software (ANSYS Workbench Thermal-electric). The thermoelectric cooler consists of thin-film n-type $Bi_2Te_3$, p-type $Sb_2Te_3$ thermoelectric elements, and Au electrode, respectively. The hot spot was placed under the center of device which represents Joule heating. Numerical analysis was conducted by geometric variable, and a maximum temperature difference of $13^{\circ}C$ was obtained. As from the simulation parameters, we presented an optimized design for high efficiency cooling.

• Journal of the Microelectronics and Packaging Society
• /
• v.25 no.4
• /
• pp.41-45
• /
• 2018

We have simulated the process induced warpage for panel level package using finite element method. Silicon chips of $5{\times}5mm^2$ were redistributed on $122.4{\times}93.6mm^2$ size panel and the total number of redistributed chips was 221. The warpage at each process step, for example, (1) EMC molding, (2) attachment of detach core, (3) heating, (4) removal of a carrier, and (5) cooling was simulated using ANSYS and the effects of detach core and carrier materials on the warpage were investigated. The warpage behaved complexly depending on the materials for the detach core and carrier. However, glass carrier showed the lower warpage than FR4 carrier regardless of detach core material, and the minimum warpage was observed when the glass was used for the detach core and carrier at the same time.

• Journal of the Microelectronics and Packaging Society
• /
• v.25 no.4
• /
• pp.47-52
• /
• 2018

In this study, the effects of the heat treatment and multi-scale hierarchical structures on the durability of the nano-patterned functional PMMA(Poly(methyl-methacrylate)) film was evaluated. The heat treatments that consisted of high-pressure/high-temperature flat pressing and rapid cooling process were employed to improve mechanical property of the PMMA films. Multi-scale hierarchical structures were fabricated by thermal nanoimprint to protect nano-scale structures from the scratch. Examination on surface structures and functionalities such as wetting angle and transmittance revealed that the preopposed heat treatment and multi-scale hierarchical structures are effective to minimize surface damages.

• Journal of the Microelectronics and Packaging Society
• /
• v.30 no.3
• /
• pp.35-39
• /
• 2023

ESG (Environment, Social, Governance) has become a major guideline for many companies to improve corporate value and enable sustainable management. Among them, the environment requires a technological approach. This is because technological solutions are needed to reduce or prevent environmental pollution and save energy. Semiconductor package technology has been developed to better satisfy the essential roles of semiconductor packaging: chip protection, electrical/mechanical connection, and heat dissipation. Accordingly, technologies have been developed to improve heat dissipation effect, improve electrical/mechanical properties, improve chip protection reliability, stacking and miniaturization, and reduce costs. Among them, heat dissipation technology increases thermal efficiency and reduces energy consumption for cooling. Also, technology to improve electrical characteristics has had an impact on the environment by reducing energy consumption. Technologies that recycling or reducing material consumption reduce environmental pollution. And technologies that replace environmentally harmful substances contribute to environmental improvement, in particular. In this paper, I summarize trends in semiconductor package technologies to prevent pollution and improve environment.

• Journal of the Microelectronics and Packaging Society
• /
• v.10 no.3
• /
• pp.29-35
• /
• 2003

The Sn-based lead-free solders with varying microstructure were prepared by changing the cooling rate from the melt. Bulky as-cast SnAg, SnAgCu, and SnCu, alloys were cold rolled and thermally stabilized before the creep tests so that there would be very small amount of microstructural change during creep (TS), and thin specimens were water quenched from the melt (WQ) to simulate microstructures of the as-reflowed solders in flip chips. Cooling rates of the WQ specimens were 140∼150 K/sec, and the resultant $\beta-Sn$ globule size was 5∼10 times smaller than that of the TS specimens. Subsequent creep tests showed that the minimum strain rate of TS specimens was about $10_2$ times higher than that of the WQ specimens. Fractographic analyses showed that creep rupture of the TS-SnAgCu specimens occurred by the nucleation of voids on the $Ag_3Sn$ Sn or $Cu_6Sn_5$ particles in the matrix, their subsequent growth by the power-law creep, and inter-linkage of microcracks to form macrocracks which led to the fast failure. On the other hand, no creep voids were found in the WQ specimens due to the mode III shear rupture coming from the thin specimens geometry.

• Journal of the Microelectronics and Packaging Society
• /
• v.29 no.3
• /
• pp.25-29
• /
• 2022

Recently, the importance of electronic packaging technology has been attracting attention, and heterogeneous integration technology in which chips are stacked out-of-plane direction is being applied to the electronic packaging field. The 2.5D integration circuit is a technology for stacking chips using an interposer including TSV, and is widely used already. Therefore, it is necessary to make the interposer mechanically reliable in the packaging process that undergoes various thermal processes and mechanical loadings. Considering the structural characteristics of the interposer on which several thin films are deposited, thermal stress due to the difference in thermal expansion coefficients of materials can have a great effect on reliability. In this study, the mechanical reliability of the metal pad for wire bonding on the silicon interposer against thermal stress was evaluated. After heating the interposer to the solder reflow temperature, the delamination of the metal pad that occurred during cooling was observed and the mechanism was investigated. In addition, it was confirmed that the high cooling rate and the defect caused by handling promote delamination of the metal pads.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2004.05a
• /
• pp.70-73
• /
• 2004

The packaging of the integrated circuits requires knowledge of ceramics and metals to accommodate the fabrication of modules that are used to construct subsystems and entire systems from extremely small components. Composite ceramics (Al$_2$O$_3$-SiO$_2$) were tested for substrates. A stress analysis was conducted for a linear work-hardening metal cylinder embedded in an infinite ceramic matrix. The bond between the metal and ceramic was established at high temperature and stresses developed during cooling to room temperature. The calculations showed that the stresses depend on the mismatch in thermal expansion, the elastic properties, and the yield strength and work hardening rate of the metal. Experimental measurements of the surface stresses have also been made on a Cu/Al$_2$O$_3$-SiO$_2$ceramic system, using an indentation technique. A comparison revealed that the calculated stresses were appreciably larger than the measured surface stresses, indicating an important difference between the bulk and surface residual stresses. However, it was also shown that porosity in the metal could plastically expand and permit substantial dilatational relaxation of the residual stresses. Conversely it was noted that pore clusters were capable of initiating ductile rupture, by means of a plastic instability, in the presence of appreciable tri-axiality. The role of ceramics for packaging of microelectronics will continue to be extremely challenging.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2003.11a
• /
• pp.308-312
• /
• 2003

The packaging of the integrated circuits requires knowledge of ceramics and metals to accommodate the fabrication of modules that are used to construct subsystems and entire systems from extremely small components. Composite ceramics ($Al_2O_3-SiO_2$) were tested for substrates. A stress analysis was conducted for a linear work-hardening metal cylinder embedded in an infinite ceramic matrix. The bond between the metal and ceramic was established at high temperature and stresses developed during cooling to room temperature. The calculations showed that the stresses depend on the mismatch in thermal expansion, the elastic properties, and the yield strength and work hardening rate of the metal. Experimental measurements of the surface stresses have also been made on a $Cu/Al_2O_3-SiO_2$ ceramic system, using an indentation technique. A comparison revealed that the calculated stresses were appreciably larger than the measured surface stresses, indicating an important difference between the bulk and surface residual stresses. However, it was also shown that porosity in the metal could plastically expand and permit substantial dilatational relaxation of the residual stresses. Conversely it was noted that pore clusters were capable of initiating ductile rupture, by means of a plastic instability, in the presence of appreciable tri-axiality. The role of ceramics for packaging of microelectronics will continue to be extremely challenging.