• Title/Summary/Keyword: Metal oxide semiconductor

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Fabrication of the FET-based SPM probe by CMOS standard process and its performance evaluation (CMOS 표준 공정을 통한 SPM 프로브의 제작 및 그 성능 평가)

  • Lee, Hoontaek;Kim, Junsoo;Shin, Kumjae;Moon, Wonkyu
    • Journal of Sensor Science and Technology
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    • v.30 no.4
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    • pp.236-242
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    • 2021
  • In this paper, we report the fabrication of the tip-on-gate of a field-effect-transistor (ToGoFET) probe using a standard complementary metal-oxide-semiconductor (CMOS) process and the performance evaluation of the fabricated probe. After the CMOS process, I-V characteristic measurement was performed on the reference MOSFET. We confirmed that the ToGoFET probe could be operated at a gate voltage of 0 V due to channel ion implantation. The transconductance at the operating point (Vg = 0 V, Vd = 2 V) was 360 ㎂/V. After the fabrication process was completed, calibration was performed using a pure metal sample. For sensitivity calibration, the relationship between the input voltage of the sample and the output current of the probe was determined and the result was consistent with the measurement result of the reference MOSFET. An oxide sample measurement was performed as an example of an application of the new ToGoFET probe. According to the measurement, the ToGoFET probe could spatially resolve a hundred nanometers with a height of a few nanometers in both the topographic image and the ToGoFET image.

Advancements in Photoactivated Gas Sensors: A Review

  • Kichul Lee;Inkyu Park
    • Journal of Sensor Science and Technology
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    • v.33 no.5
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    • pp.359-365
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    • 2024
  • Chemiresistive semiconductor metal oxide (SMO) gas sensors detect gases based on resistance changes caused by gas adsorption/desorption on SMOs. These sensors have witnessed significant advancements with the development of microelectromechanical systems (MEMS) and nanotechnology. MEMS technology has facilitated mass production, miniaturization, and uniformity across sensors. Whereas, nanotechnology has contributed to the development of high-sensitivity gas sensing materials with large surface areas, catalytic coatings, and hybrid SMO junctions. However, SMOs require activation via external energy to overcome their bandgap energy and generate hot electron carriers, which are essential for high sensitivity and fast response/recovery times. Traditionally, embedded heaters have been used for this purpose; however, micro-and nano-heaters are plagued by high power consumption and low durability, which limit their use in mobile applications. Consequently, photoactivated gas sensing using light sources (e.g., lamps and LEDs) has garnered attention as an alternative approach. This study reviewed the progress from early lamp and LED-based research to recent studies on monolithic micro-LED (µLED) based gas sensors. µLED gas sensors facilitate room-temperature operation and ultra-low power consumption within the microwatt range. Consequently, they are highly suitable for integration into consumer electronics, smart farms, smart factories, and mobile gas sensors.

DC and RF Characteristics of $Si_{0.8}Ge_{0.2}$ pMOSFETs: Enhanced Operation Speed and Low 1/f Noise

  • Song, Young-Joo;Shim, Kyu-Hwan;Kang, Jin-Young;Cho, Kyoung-Ik
    • ETRI Journal
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    • v.25 no.3
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    • pp.203-209
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    • 2003
  • This paper reports on our investigation of DC and RF characteristics of p-channel metal oxide semiconductor field effect transistors (pMOSFETs) with a compressively strained $Si_{0.8}Ge_{0.2}$ channel. Because of enhanced hole mobility in the $Si_{0.8}Ge_{0.2}$ buried layer, the $Si_{0.8}Ge_{0.2}$ pMOSFET showed improved DC and RF characteristics. We demonstrate that the 1/f noise in the $Si_{0.8}Ge_{0.2}$ pMOSFET was much lower than that in the all-Si counterpart, regardless of gate-oxide degradation by electrical stress. These results suggest that the $Si_{0.8}Ge_{0.2}$ pMOSFET is suitable for RF applications that require high speed and low 1/f noise.

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A New Method for Extracting Interface Trap Density in Short-Channel MOSFETs from Substrate-Bias-Dependent Subthreshold Slopes

  • Lyu, Jong-Son
    • ETRI Journal
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    • v.15 no.2
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    • pp.11-25
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    • 1993
  • Interface trap densities at gate oxide/silicon substrate ($SiO_2/Si$) interfaces of metal oxide semiconductor field-effect transistors (MOSFETs) were determined from the substrate bias dependence of the subthreshold slope measurement. This method enables the characterization of interface traps residing in the energy level between the midgap and that corresponding to the strong inversion of small size MOSFET. In consequence of the high accuracy of this method, the energy dependence of the interface trap density can be accurately determined. The application of this technique to a MOSFET showed good agreement with the result obtained through the high-frequency/quasi-static capacitance-voltage (C-V) technique for a MOS capacitor. Furthermore, the effective substrate dopant concentration obtained through this technique also showed good agreement with the result obtained through the body effect measurement.

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산화물 박막 증착 시 발생하는 산소 음이온 측정

  • Choe, Jin-U;Park, Hye-Jin;Jo, Tae-Hun;Hwang, Sang-Hyeok;Park, Jong-In;Yun, Myeong-Su;Gwon, Gi-Cheong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.150.1-150.1
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    • 2015
  • 일부 금속들은 산화물을 형성하여 반도체적 성질을 갖게 되는데 이를 산화물 반도체라 한다. 산화물 반도체는 전자의 전도 특성에 의해 기존에 널리 사용되고 있는 a-Si 반도체 보다 뛰어난 전자 이동도를 갖고 넒은 Band gap energy를 갖기 때문에 누설 전류가 적어 Device 제작 시 저전력 구동이 가능하다는 장점이 있어 관련 연구가 활발히 진행 중이다. 산화물 박막을 증착하는 방법으로는 용액 공정, CVD, Sputtering 등이 있다. 그 중 Sputtering을 이용한 산화물 박막 증착 시 산소 음이온이 기판으로 가속하여 박막에 충돌, 박막 물성에 영향을 준다는 연구결과가 보고되고 있다. 본 연구에서는 Sputtering을 이용하여 ITO를 증착하는 과정에서 발생하는 산소 음이온을 측정하는 장치를 개발하여 산소 음이온 발생여부를 확인해 보았다.

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Study on Elecrtical Characteristics of Gate Oxide with Electrode Materials and Oxidation Ambients (전극 재료와 산화분위기에 따른 게이트 산화막의 전기적 특성에 관한 특성)

  • 정회환;정관수
    • Journal of the Korean Vacuum Society
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    • v.4 no.1
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    • pp.18-25
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    • 1995
  • 건식, 습식, 건식/습식 산화분위기로 성장한 게이트 산화막 위에 AI, 인 도핑된 다결정시리콘, 비정질 실리콘/인 도핑된 다결정 실리콘을 증착하여 제작한 금속-산화물-반도체(metal-oxide-semiconductor:MOS)의 전기적 특성을 순간 절연파괴(TZDB), 정전용량-전압(C-V)과 경시절연파괴(TDDB)로 평가하였다. AI 게이트에서 습식산화막과 건식산화막의 평균 파괴전계는 각각 9.0MV/cm, 7.7MV/cm이였고, 습식산화막의 평균 파괴전계가 8.4MV/cm 이였으며, AI 게이트보다 0.6MV/cm 정도 낮았다. 이것은 다결정 실리콘/습식산화막 계면에서 인(phosphorus) 확산으로 다결정 실리콘의 grain 성장과 산화막의 migration에 의한 roughness 증가에 기인한다. 그러나 다결정 실리콘/건식산화막 계면에서 roughness 증가는 없었다. 다결정 실리콘 게이트에서는 건식/습식 산화막이 건식산화막과 습식산화막보다 평균 파괴전계와 절연파괴전하(QBD)가 높았다. 또한 다결정/비정질 실리콘 게이트에서는 습식산화막의 평균 파괴전계가 8.8MV/cm이였으며, 다결정 실리콘 게이트에서보다 0.4MV/cm 정도 높았다. 다결정/비정질 실리콘 구조는 앞으로 VLSI 적용에 있어서 게이트 전극으로 매우 유용할 것이다.

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Growth of ZnO nanorods by vapor-solid method (기상증착법을 이용한 산화아연 나노로드의 성장)

  • 김나리;김재수;변동진;노대호;진정근;양재웅
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2003.11a
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    • pp.122-122
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    • 2003
  • In recent years, there has been increasing interest in quasi one-dimensional nanostructural systems, because of their numerous potential applications in various areas, such as materials sciences, electronics, optics, magnetism and energy storage. Specifically, zinc oxide (ZnO) is recognized as one of the most promising oxide semiconductor materials, because of its good optical, electrical, and piezoelectrical properties. The ZnO nanorods were synthesized using vapor-solid (VS) mechanism on soda lime glass substrate without the presence of metal catalyst. ZnO nanorods were prepared thermal evaporation of a Zn powder at 500. As-fabricated ZnO nanorods had an average diameter and length of 40nm and 3$\mu\textrm{m}$. Transmission electron microscopy revealed that the ZnO nanorods were single crystalline with the growth direction perpendicular to the (101) lattice plane. The influences of reaction time on the formation of the ZnO nanorods were investigated. The Photoluminescence measurements showed that the ZnO nanorods had a strong ultraviolet emission at around 380nm and a green emission at around 500nm.

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Effect on the Sensitivity of a Hydrogen Sensor by Pd Electrode Patterns at High Temperature (고온에서 Pd 전극의 형태가 수소 센서의 감도에 미치는 영향)

  • Kim, Seong-Jeen
    • Journal of IKEEE
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    • v.22 no.2
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    • pp.356-361
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    • 2018
  • We investigated a hydrogen gas sensor which is available in a high temperature atmosphere. The hydrogen sensors were fabricated into a metal-oxide-semiconductor (MOS) structure made of $Pd/Ta_2O_5/SiC$, and the thin tantalum oxide ($Ta_2O_5$) layer was fabricated by rapid thermal oxidation (RTO). In the experiment, we made three types of sensors with different palladium (Pd) patterns to evaluate the effect of Pd electrode on response characteristics. As the result, the response characteristics in capacitance were improved further when the filled area of the Pd electrode became larger.

Chip design and application of gas classification function using MLP classification method (MLP분류법을 적용한 가스분류기능의 칩 설계 및 응용)

  • 장으뜸;서용수;정완영
    • Proceedings of the IEEK Conference
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    • 2001.06b
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    • pp.309-312
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    • 2001
  • A primitive gas classification system which can classify limited species of gas was designed and simulated. The 'electronic nose' consists of an array of 4 metal oxide gas sensors with different selectivity patterns, signal collecting unit and a signal pattern recognition and decision Part in PLD(programmable logic device) chip. Sensor array consists of four commercial, tin oxide based, semiconductor type gas sensors. BP(back propagation) neutral networks with MLP(Multilayer Perceptron) structure was designed and implemented on CPLD of fifty thousand gate level chip by VHDL language for processing the input signals from 4 gas sensors and qualification of gases in air. The network contained four input units, one hidden layer with 4 neurons and output with 4 regular neurons. The 'electronic nose' system was successfully classified 4 kinds of industrial gases in computer simulation.

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Device Wafer의 평탄화와 AFM에 의한 평가

  • 김호윤;정해도
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 1996.11a
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    • pp.167-171
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    • 1996
  • Chemical mechanical polishing (CMP) has become widely accepted for the planarization of multi-interconnect structures in semiconductor manufacturing. However, perfect planarization is not so easily achieved because it depends on the pattern sensitivity, the large number of controllable process parameters, and the absence of a reliable process model, etc. In this paper, we realized the planarization of deposited oxide layers followed by metal (W) polishing as a replacement for tungsten etchback process for via formation. Atomic force microscope (AFM) is used for the evaluation of pattern topography during CMP. As a result, AFM evaluation is very attractive compared to conventional methods for the measurement of planarity. Moreover, it will contribute to analyze planarization characteristics and establish CMP model.

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