• 한국전기전자재료학회논문지
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• 제17권4호
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• pp.378-383
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• 2004

Tungsten is widely used as a plug for the multi-level interconnection structures. However, due to the poor adhesive properties of tungsten(W) on SiO$_2$ layer, the Ti/TiN barrier layer is usually deposited onto SiO$_2$ for increasing adhesion ability with W film. Generally, for the W-CMP(chemical mechanical polishing) process, the passivation layer on the tungsten surface during CMP plays an important role. In this paper, the effect of oxidant on the polishing selectivity of W/Ti/TiN layer was investigated. The alumina(A1$_2$O$_3$)-based slurry with $H_2O$$_2$ as the oxidizer was used for CMP applications. As an experimental result, for the case of 5 wt％ oxidizer added, the removal rates were improved and polishing selectivity of 1.4:1 was obtained. It was also found that the CMP characteristics of W and Ti metal layer including surface roughness were strongly dependent on the amounts of $H_2O$$_2$ oxidizer.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 추계학술대회 논문집
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• pp.529-529
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• 2007

Ruthenium (Ru) is a white metal and belongs to platinum group which is very stable chemically and has a high work function. It has been widely studied to apply Ru as an electrode material in memory devices and a Cu diffusion barrier metal for Cu interconnection due to good electrical conductivity and adhesion property to Cu layer. To planarize deposited Ru layer, chemical mechanical planarization(CMP) was suggested. However, abrasive particle can induce particle contamination on the Ru layer surface during CMP process. In this study, zeta potentials of Ru and interaction force of alumina particles with Ru substrate were measured as a function of pH. The etch rate and oxidation behavior were measured as a function of chemical concentration of several organic acids and other acidic and alkaline chemicals. PRE (particle removal efficiency) was also evaluated in cleaning chemical.

• 한국진공학회지
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• 제6권S1호
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• pp.122-126
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• 1997

the Cu/polyimide system is known to be the best candidate for a multilevel interconnection system due to the low resistance of Cu and to the low dielectric constant of polyimide respectively. Ion beam mixing of Cu(40nm)/polyimide was carried out at room temperature with 80 keV Ar+ and N2+ form $1.5\times$1015 to 15$\times$1015 ions/cm2. The quantitative adhesion strength was measured by a standard scratch test. X-ray photoelectron spectroscopy and x-ray emission spectrocopy are employed to investigate the chemical bonds and the interlayer compound formation of the films Cu/Al/polyimide showed more adhesion strength than Cu/polyimide after ion beam mixing and N2+ ions are more effective in the adhesion enhancement than Ar+ with the same sample geometry. The XES results shows the formation of interlayer compound of CuAl2O4 which can reflect more adhesive Cu/Al/polyimide which has not been reported previously. The latter results is understood by the fact that N2+ ions produce more pyridinelike moiety, amide group and tertiary amine moiety whcih are known as adhesion promotors.

• 전자공학회논문지A
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• 제33A권12호
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• pp.53-58
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• 1996

In this paper, a simple fabrication technique of an air-bridge for interconnection of isolated electrodes of microwave active and passive devices and MMIC's is proposed. The proposed air-bridge proceses are mainly combinations of thermal evaporation, positive photoresist and image reversal processes for easy lift-off of up to 2.0 .mu.m thick metal. According to the resutls of air-birdge processes, it is confirmed that air-gap and thickness of theair-bridge are about 3.5.mu.m, and 2.0.mu.m, respectively. And it is also possible to make the fine air-bridge with widths of 5~60.mu.m and post-intervals of 25~200.mu.m withot collapse. finally, GaAs power MESFET's and rectangular spiral inductors are fabricatd and measured in order to confirm of feasibility of the proposed air-bridge processes. The MAG of the fabricated power MESFET's is 10dB at 10GHz, and the inductance of the (200.mu. * 6 turns) rectangular spiral inductors 4.5 nH inX-band.

• 마이크로전자및패키징학회지
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• 제24권1호
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• pp.35-43
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• 2017

The three-dimensional integrated circuit (3D-IC) is a general trend for the miniaturized and high-performance electronic devices. The through-silicon-via (TSV) is the advanced interconnection method to achieve 3D integration, which uses vertical metal via through silicon substrate. However, the TSV based 3D-IC undergoes severe thermo-mechanical stress due to the CTE (coefficient of thermal expansion) mismatch between via and silicon. The thermo-mechanical stress induces mechanical failure on silicon and silicon-via interface, which reduces the device reliability. In this paper, the thermo-mechanical reliability of TSV based 3D-IC is reviewed in terms of mechanical fracture, heat conduction, and material characteristic. Furthermore, the state of the art via-level and package-level design techniques are introduced to improve the reliability of TSV based 3D-IC.

• 한국태양에너지학회:학술대회논문집
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• 한국태양에너지학회 2012년도 춘계학술발표대회 논문집
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• pp.102-107
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• 2012

The purpose of thesis is to improve output of solar cell module by enhancing transmission efficiency. To improve transmission efficiency, transmission interconnection ribbon which is used to connect solar cells and busbar which contacts with it has been improved. To secure reliability, comparison research on output of solar cell modules has been conducted by manufacturing PCB module formed by laminated metal with the same output. The result of this research is based on a output efficiency test of modules by comparing electric conductivity of soldering busbar and laminated PCV type of busbar.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 추계학술대회 논문집 Vol.18
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• pp.72-73
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• 2005

Stress behavior was studied to investigate the internal behaviors of boron, carbon, and nitrogen in the 1000${\AA}$-thick tungsten boron carbon nitride (W-B-C-N) thin films. The impurities in the W-B-C-N thin films provide stuffing effects that were very effective for preventing the interdiffusion between interconnection metal and silicon substrate during the subsequent high temperature annealing process. The resistivity of W-B-C-N thin film decreases as an annealing temperature increase. The W-B-C-N thin films have compressive stress, and the stress value decreased up to $4.11\times10^{10}dyne/cm^2$ as an $N_2$ flow rate increases up to 3 sccm.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2010년도 제39회 하계학술대회 초록집
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• pp.294-294
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• 2010

Over the last decade, dye-sensitized solar cell (DSSC) has attracted much attention due to the high solar-to-electricity conversion efficiency up to 10% as well as low cost compared with p-n junction photovoltaic devices. DSSC is composed of mesoporous TiO2 nanoparticle electrodes coated with photo-sensitized dye, the redox electrolyte and the metal counter electrode. The performances of DSSC are dependent on constituent materials and interface as well as device structure. Replacing the heavy glass substrate with plastic materials is crucial to enlarge DSSC applications for the competition with inorganic based thin film photovoltaic devices. One of the biggest problems with plastic substrates is their low-temperature tolerance, which makes sintering of the photoelectrode films impossible. Therefore, the most important step toward the low-temperature DSSC fabrication is how to enhance interparticle connection at the temperature lower than $150^{\circ}C$. In this talk, the key issues for high efficiency plastic solar cells will be discussed, and several strategies for the improvement of interconnection of nanoparticles and bendability will also be proposed.

• 대한용접접합학회:학술대회논문집
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• 대한용접접합학회 2007년 추계학술발표대회 개요집
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• pp.229-231
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• 2007

Recently, 3D-electronic packaging by TSV is in interest. TSV(Through Silicon Via) is a interconnection hole on Si-wafer filled with conducting metal such as Copper. In this research, chips with TSV are connected by electroplated Sn bump without PR. Then chips with TSV are put together and stacked by the methode of Reflow soldering. The stacking was successfully done and had no noticeable defects. By eliminating PR process, entire process can be reduced and makes it easier to apply on commercial production.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제51권7호
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• pp.311-315
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• 2002

Chemical mechanical polishing (CMP) process was required for the global planarization of inter-metal dielectric(IMD), inter-level dielectric (ILD) layers of multi-layer interconnections. In this paper, we studied the characteristics of polishing pad, which can apply shallow trench isolation (STI)-CMP process for global planarization of multi-level interconnection structure. Also, we investigated the effects of different sets of polishing pad, such as soft and hard pad. As an experimental result, hard pad showed center-fast type, and soft pad showed edge-fast type. Totally, the defect level has shown little difference, however, the counts of scratch was detected less than 2 on JR111 pad. Through the above results, we can select optimum polishing pad, so we can expect the improvements of throughput and device yield.