• 제목/요약/키워드: Memory school

검색결과 1,496건 처리시간 0.031초

복신(茯神)의 인지기능 향상 및 해마 신경세포분화 촉진에 대한 효능 연구 (Effect of Hoelen Cum Radix on learning and memory enhancement via stimulation of neuronal differentiation in the hippocampus of the mouse brain)

  • 최진규;심여문;김원남;김선여;오명숙
    • 대한본초학회지
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    • 제30권2호
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    • pp.43-48
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    • 2015
  • Objectives : The aim of this study was to investigate the memory enhancing properties of extract of Hoelen Cum Radix (HCR) and its possible mechanism in mice of normal condition. Methods : We evaluated the effects of HCR on cognitive function and memory enhancement in normal mice. Male ICR mice were orally administrated with HCR 100 mg/kg for 7 days and equal volume of saline was administrated to the control group in the same condition. We conducted two behavioral tests which measure the spatial working memory (Y-maze test) and cognitive fear memory (passive avoidance test). We also investigated whether HCR affects the hippocampal neurogenesis in the brain. To assess the effects of HCR on neural progenitor cell differentiation and neurite outgrowth in the early stage of hippocampal neurogenesis, we performed doublecortin (DCX), a direct neurogenesis marker, immunohistochemical analysis in the dentate gyrus (DG) of the mouse hippocampus. Results : HCR significantly enhanced memory and cognitive function as determined by the Y-maze test (p<0.05) and passive avoidance test (p<0.001). Moreover, HCR increased DCX positive cells (p<0.01) and neurite length (p<0.01) compared to the control group. These results indicated that HCR stimulates differentiation of neural progenitor cells and promotes neurite outgrowth in hippocampal DG of the mice. Conclusion : We concluded that HCR shows memory enhancing effects through the stimulation of hippocampal neurogenesis as a consequence of accelerated neuronal differentiation and neurite outgrowth in the DG of the hippocampus after HCR treatment.

A Subthreshold Slope and Low-frequency Noise Characteristics in Charge Trap Flash Memories with Gate-All-Around and Planar Structure

  • Lee, Myoung-Sun;Joe, Sung-Min;Yun, Jang-Gn;Shin, Hyung-Cheol;Park, Byung-Gook;Park, Sang-Sik;Lee, Jong-Ho
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제12권3호
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    • pp.360-369
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    • 2012
  • The causes of showing different subthreshold slopes (SS) in programmed and erased states for two different charge trap flash (CTF) memory devices, SONOS type flash memory with gate-all-around (GAA) structure and TANOS type NAND flash memory with planar structure were investigated. To analyze the difference in SSs, TCAD simulation and low-frequency noise (LFN) measurement were fulfilled. The device simulation was performed to compare SSs considering the gate electric field effect to the channel and to check the localized trapped charge distribution effect in nitride layer while the comparison of noise power spectrum was carried out to inspect the generation of interface traps ($N_{IT}$). When each cell in the measured two memory devices is erased, the normalized LFN power is increased by one order of magnitude, which is attributed to the generation of $N_{IT}$ originated by the movement of hydrogen species ($h^*$) from the interface. As a result, the SS is degraded for the GAA SONOS memory device when erased where the $N_{IT}$ generation is a prominent factor. However, the TANOS memory cell is relatively immune to the SS degradation effect induced by the generated $N_{IT}$.

공유 메모리 기반 시스토릭 어레이 FFT 프로세서 설계 및 구현 (Design and Implementation Systolic Array FFT Processor Based on Shared Memory)

  • 정동민;노윤석;손한나;정용철;정윤호
    • 전기전자학회논문지
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    • 제24권3호
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    • pp.797-802
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    • 2020
  • 본 논문에서는 base-4 시스토릭 어레이 FFT 프로세서에서 사용되는 여러 메모리를 하나의 메모리로 공유함으로써 기존 보다 작은 메모리 면적의 FFT 프로세서의 설계 및 구현 결과를 제시한다. 메모리를 공유하여 면적이 줄어드는 장점이 생겼으며, 데이터의 입출력이 하나의 메모리에서 진행되므로 데이터의 흐름이 단순해졌다. 제시한 FFT 프로세서를 FPGA 디바이스 상에서 구현 및 검증하였으며, 구현 결과 4096-point FFT 기준 51,855개의 CLB LUT, 29,712개의 CLB registers, 8개의 block RAM tile과 450개의 DSP로 구현되었고, 최대 동작 주파수는 150MHz 인 것을 확인했으며 특히, 기존 base-4 시스토릭 어레이 구조 대비 메모리 면적이 65% 감소 가능함을 확인하였다.

학령기 아동용 스마트기기를 사용한 기억력 평가과제의 개발 및 타당도 검증 연구 (The Development and Validation of Memory Tasks Using Smart Devices for School Aged Children)

  • 신민섭;이진주;어윤정;오서진;이정은;김일중;홍초롱
    • Journal of the Korean Academy of Child and Adolescent Psychiatry
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    • 제27권2호
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    • pp.130-138
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    • 2016
  • Objectives: The aim of this study was to develop auditory-verbal and visual-spatial memory tasks using smart devices for children aged 8 to 10 years and examine their validity. Methods: One-hundred and fourteen school-aged children were recruited through internet advertising. We developed memory tasks assessing auditory-verbal memory, visual-spatial memory, and working memory, and then examined their construct validity by examining the developmental trend of the children's mean scores with age. In order to examine the concurrent validity of the tasks, we conducted correlation analyses between the children's scores on the newly developed auditory-verbal, visual-spatial memory and working memory tasks and their scores on well-known standardized tests of memory and working memory, including the auditory-verbal memory subtests of the Korean Luria-Nebraska Neuropsychological Battery for Children, Korean Rey-Osterrieth Complex Figure Test, digit span and arithmetic subtest of Korean Educational Development Institute Wechsler Intelligence Scale for Children Revised, and Corsi block test. Results: The memory and working memory scores measured by the newly developed tasks tended to increase with age. Further, there were significant correlations between the scores of the four cognitive tasks and the corresponding scores of the standardized assessment tools. Conclusion: This study revealed promising evidence for the validity of the memory tasks using smart devices, suggesting their utility for school-aged children in research and clinical settings.

Time-Varying Signal Parameter Estimation by Variable Fading Memory Kalman Filtering

  • Lee, Sang-Wook;Lim, Jun-Seok;Sung, Koeng-Mo
    • The Journal of the Acoustical Society of Korea
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    • 제17권3E호
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    • pp.47-52
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    • 1998
  • This paper prolposes a VFM (Variable Fading Memory)Kalman filtering and applies it to the parameter estimation for time-varying signals. By adaptively calculating the fading memory, the proposed algorithm does not require any predetermined fading memory when estimating the time-varying signal parameter. Moreover, the proposed algorithm has faster convergence speed than fixed fading memory one in case the signal contains an impulsive outlier. The performance of parameter estimation for time-varying signal is evaluated by computer simulation for two cases, one of which is the chirp signal whose frequency varies linearly with time and the other is the chip signal with an impulsive outlier. The experimental results show that the VFM Kalman filtering estimates the parameter of the chirp signal more rapidly than the fixed fading memory one in the region of an outlier.

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Roles of Virtual Memory T Cells in Diseases

  • Joon Seok;Sung-Dong Cho;Seong Jun Seo;Su-Hyung Park
    • IMMUNE NETWORK
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    • 제23권1호
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    • pp.11.1-11.11
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    • 2023
  • Memory T cells that mediate fast and effective protection against reinfections are usually generated upon recognition on foreign Ags. However, a "memory-like" T-cell population, termed virtual memory T (TVM) cells that acquire a memory phenotype in the absence of foreign Ag, has been reported. Although, like innate cells, TVM cells reportedly play a role in first-line defense to bacterial or viral infections, their protective or pathological roles in immune-related diseases are largely unknown. In this review, we discuss the current understanding of TVM cells, focusing on their distinct characteristics, immunological properties, and roles in various immune-related diseases, such as infections and cancers.

고등학교 정보 교과서에 제시된 기억 장치 영역 내용의 문제점 분석 및 개선 방안 (Problem Analysis and Recommendations of Memory Contents in High School Informatics Textbooks)

  • 이상욱;서태원
    • 컴퓨터교육학회논문지
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    • 제15권3호
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    • pp.37-47
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    • 2012
  • 고등학교 정보 과목의 주요한 교육 목표는 컴퓨터 과학에 대한 올바른 지식 습득 및 활용을 통한 창의적인 문제 해결력 향상에 있다. 이러한 교육 목표를 달성하기 위해서는 무엇보다도 정보 교과서의 내용이 정확하고 적절해야 한다. 그러나 현재의 정보 교과서에는 주기억 장치와 가상 메모리 관련 내용 중 정확성이 결여된 설명이 포함되어 있다. 교과서는 주기억 장치를 RAM과 ROM으로 분류하고 있으며, 가상 메모리를 주기억 장치보다 큰 프로그램을 실행하기 위해 보조기억 장치의 일부를 주기억 장치로 사용하는 것으로 설명하고 있다. 본 연구에서는 미국 대부분의 대학에서 교재로 사용되고 있는 컴퓨터 전문 서적과의 비교 분석을 통하여 정보 교과서에 존재하는 오류의 원인을 분석하고 개선 방안을 제시하고자 하였다. 연구 결과, 주기억 장치의 종류로 ROM을 포함시키는 것은 적절하지 않다는 것을 메모리 계층 구조를 통하여 보여주었다. 가상 메모리는 프로그래머의 편의를 위해 시스템이 제공하는 기술로 이를 통해 운영체제는 프로그램의 실행에 필요한 부분만을 보조기억 장치로부터 주기억 장치에 적재한다. 현재의 컴퓨터 시스템에서는 가상메모리를 사용하는 장점으로 주기억 장치보다 큰 프로그램을 실행할 수 있다는 점보다 다수의 프로그램이 주기억 장치를 공유하여 멀티태스킹을 효과적으로 지원한다는 점이 부각되어야 한다. 또한 가상 메모리는 고등학생의 인지 발달 수준에서 이해하기에는 복잡하고 어려운 개념이기 때문에 고등학교 교육과정에서는 다루지 않는 것이 바람직하다고 제안하였다.

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Strengthened connections between engrams encode specific memories

  • Kim, Ji-il;Choi, Dong Il;Kaang, Bong-Kiun
    • BMB Reports
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    • 제51권8호
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    • pp.369-370
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    • 2018
  • In previous studies, memory storage was localized to engram cells distributed across the brain. While these studies have provided an individual cellular profile of engram cells, their synaptic connectivity, or whether they follow Hebbian mechanisms, remains uncertain. Therefore, our recent study investigated whether synapses between engram cells exhibit selectively enhanced structural and functional properties following memory formation. This was accomplished using a newly developed technique called "dual-eGRASP". We found that the number and size of spines on CA1 engram cells that receive inputs from CA3 engram cells were larger than at other synapses. We further observed that this enhanced connectivity correlated with induced memory strength. CA3 engram synapses exhibited increased release probability, while CA1 engram synapses produced enhanced postsynaptic responses. CA3 engram to CA1 engram projections showed strong occlusion of long-term potentiation. We demonstrated that the synaptic connectivity of CA3 to CA1 engram cells was strengthened following memory formation. Our results suggest that Hebbian plasticity occurs during memory formation among engram cells at the synapse level.

Determinants of Positive Word of Mouth for a Contemporary Art Exhibition on Web-based Virtual Reality

  • Han, Jingyi;Zhu, Zong-Yi;Kim, Hyeon-Cheol
    • International Journal of Internet, Broadcasting and Communication
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    • 제13권3호
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    • pp.137-147
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    • 2021
  • We aimsto examine the determinants of visitors' positive word-of-mouth (WOM) in a web-based virtual reality contemporary art exhibition. We also examines the effects of 3 realms of experience (entertainment, esthetic, escapist) on emotional arousal, how this emotional arousal affects memory and positive word-of-mouth, how memory affects positive word-of-mouth and how age moderate all of the paths. We examined a total of 297 visitors and was conducted through an online survey focusing on Chinese users of ages 20-49. The analysis results showed that entertainment and esthetic have an effect on emotional arousal, but escapist did not. The results also showed emotional arousal has an effect on memory and positive WOM. Memory did not affect positive word-of-mouth. Finally, age has a moderate effect on all the paths, except for the path form escape towards emotional arousal and memory to positive word-of-mouth. The theoretical implications of this study are meaningful exhibition research. While, it also will be helpful to segment the web-based virtual reality art exhibition visitors by dividing into 3 groups (20s, 30s, 40s) and to provide marketing and operation strategies.

마이크로컨트롤러 환경에서 타깃 바이너리 파일 분석을 통한 최대 스택 메모리 사용량 예측 기법 (Maximum Stack Memory Usage Estimation Through Target Binary File Analysis in Microcontroller Environment)

  • 최기호;김성섭;박대진;조정훈
    • 대한임베디드공학회논문지
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    • 제12권3호
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    • pp.159-167
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    • 2017
  • Software safety is a key issue in embedded system of automotive and aviation industries. Various software testing approaches have been proposed to achieve software safety like ISO26262 Part 6 in automotive environment. In spite of one of the classic and basic approaches, stack memory is hard to estimating exactly because of uncertainty of target code generated by compiler and complex nested interrupt. In this paper, we propose an approach of analyzing the maximum stack usage statically from target binary code rather than the source code that also allows nested interrupts for determining the exact stack memory size. In our approach, determining maximum stack usage is divided into three steps: data extraction from ELF file, construction of call graph, and consideration of nested interrupt configurations for determining required stack size from the ISR (Interrupt Service Routine). Experimental results of the estimation of the maximum stack usage shows proposed approach is helpful for optimizing stack memory size and checking the stability of the program in the embedded system that especially supports nested interrupts.