• Journal of the Korea Academia-Industrial cooperation Society
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• v.4 no.4
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• pp.372-379
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• 2003

In order to improve a damage of connection part of Main Board Memory, we developed a hazard extension card(Socket Jig). The damage occurs during the test of the memory module product of the Desktop-PC. The connection part of main board was broken by 15％ per a day before the development. There existed two major problems; One was that we must obtain more than 15％ of surplus equipment. while the other was that we needed people who were wholly responsible for repair. The development of extension card decreased operation delay. Besides, it improved capacity of surplus equipment and operation efficiency. Therefore, we can save 78,000,000 won per year.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.2
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• pp.114-121
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• 2013

As the weight of embedded memory within Systems-On-Chips(SoC) rapidly increases to 80-90% of the number of total transistors, the importance of testing embedded memory in SoC increases. This paper proposes IEEE std. 1500 wrapper based Programmable Memory Built-In Self-Test(PMBIST) architecture which can support various kinds of test algorithm. The proposed PMBIST guarantees high flexibility, programmability and fault coverage using not only March algorithms but also non-March algorithms such as Walking and Galloping. The PMBIST has an optimal hardware overhead by an optimum program instruction set and a smaller program memory. Furthermore, the proposed fault information processing scheme guarantees improvement of the memory yield by effectively supporting three types of the diagnostic methods for repair and diagnosis.

• Journal of Information Technology Services
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• v.13 no.3
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• pp.275-298
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• 2014

The purpose of this study is to verify the difference between the importance level and the satisfaction level of each purchase decision factor of smart phone. Through review of literatures about purchase decision factors, we have derived about attributes of 6 factors. T-test, importance performance analysis (IPA), and regression analysis were conducted to identify priorities among the details of the importance and satisfaction and to analyze the effect relationship between satisfaction of each factor and overall satisfaction. Looking at a few high-priority order, battery capacity, memory capacity, fast and accurate repair, the adequacy of the repair cost, and processor in the top five factors were shown to be an important factor when purchasing smart phones. The results of this study can provide the marketing strategies for smart phone suppliers. In addition, these results imply what factors of smart phones should be more considered before launching into chinese smart phone market.

• The Journal of the Acoustical Society of Korea
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• v.20 no.1E
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• pp.14-19
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• 2001

We have proposed BIST method and circuit for embedded 16M SDRAM with logic. It can test the AC parameter of embedded 16M SDRAM using the BIST circuit capable of detecting the address of a fail cell installed in an Merged Memory with Logic(MML). It generates the information of repair for redundancy circuit. The function and AC parameter of the embedded memory can also be tested using the proposed BIST method. It is possible to test the embedded SDRAM without external test pin. The total gate of the BIST circuit is approximately 4,500 in the case of synthesizing by 0.25μm cell library and is verified by Verilog simulation. The test time of each one AC parameter is about 200ms using 2Y-March 14n algorithm.

• Molecules and Cells
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• v.37 no.11
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• pp.767-776
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• 2014

Alzheimer's disease (AD) is clinically characterized with progressive memory loss and cognitive decline. Synaptic dysfunction is an early pathological feature that occurs prior to neurodegeneration and memory dysfunction. Mounting evidence suggests that aggregation of amyloid-${\alpha}$ ($A{\alpha}$) and hyperphosphorylated tau leads to synaptic deficits and neurodegeneration, thereby to memory loss. Among the established genetic risk factors for AD, the ${\varepsilon}4$ allele of apolipoprotein E (APOE) is the strongest genetic risk factor. We and others previously demonstrated that apoE regulates $A{\alpha}$ aggregation and clearance in an isoform-dependent manner. While the effect of apoE on $A{\alpha}$ may explain how apoE isoforms differentially affect AD pathogenesis, there are also other underexplored pathogenic mechanisms. They include differential effects of apoE on cerebral energy metabolism, neuroinflammation, neurovascular function, neurogenesis, and synaptic plasticity. ApoE is a major carrier of cholesterols that are required for neuronal activity and injury repair in the brain. Although there are a few conflicting findings and the underlying mechanism is still unclear, several lines of studies demonstrated that apoE4 leads to synaptic deficits and impairment in long-term potentiation, memory and cognition. In this review, we summarize current understanding of apoE function in the brain, with a particular emphasis on its role in synaptic plasticity and the underlying cellular and molecular mechanisms, involving low-density lipoprotein receptor-related protein 1 (LRP1), syndecan, and LRP8/ApoER2.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2006.05a
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• pp.295-296
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• 2006

We developed wire frame drive unit based on SMA for the 3D Shape display. Our basic concept is wire frame combination connected with a chain form which can create various shapes and it compared with pin array mechanism which is not able to display mushroom shape. It imitates antagonist mechanism of human musculoskeletal system. we create similar motion using repair-relaxation mechanism and locking mechanism by SMA. Therefore, in this paper, we propose SMA control solution for actuating repair-relaxation mechanism and locking mechanism. In our control system. we use optical sensor and quantitative angle between wire frames for closed loop control. And we supply amplified current for SMA by circuit composed of transistor and apply PWM signal to circuit for efficient control. So, wire frame drive unit enable diversity angle control based on sensor data. And then combination of wire frame drive units will create various objects.

• The Journal of Information Technology
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• v.3 no.3
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• pp.57-65
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• 2000

We have proposed BIST method and circuit for embedded 16M SDRAM with logic. It can test the AC parameter of embedded 16M SDRAM using the BIST circuit capable of detecting the address of a fail cell of a 16M SDRAM installed in an Merged Memory with Logic(MML) generating the information of repair for redundancy circuit. The function and AC parameter of the embedded memory can also be tested using the proposed BIST method. The total gate of the BIST circuit is approximately 4,500 in the case of synthesizing by $0.25\mu\textrm{m}$ cell library. and verify the result of Verilog simulation. The test time of each one AC parameter is about 200ms using 2Y-March 14N algorithm.

• KSCE Journal of Civil and Environmental Engineering Research
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• v.40 no.4
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• pp.353-362
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• 2020

Korea was recognized as a relatively safe area for earthquake. However, due to considerable damage to facilities caused by the earthquake in Gyeongju and Pohang, interest in the maintenance and repair of structures is increasing. So interest in vibration damping technology applicable to existing structures is also increasing. However, vibration damping technology has a problem in that its usability is reduced due to damage of the damping device when a strong earthquake occurs. Recently, in order to solve such a problem, study is being conducted to apply a superelastic shape memory alloys (SSMA) capable of recentering bracing. Therefore, in this study, nonlinear dynamic analysis is performed to evaluate the seismic performance of the buckling-restrained braced frame (BRBF) applied SSMA to bracing.

• Smart Structures and Systems
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• v.24 no.1
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• pp.127-139
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• 2019

Residual drifts after an earthquake can incur huge repair costs and might need to replace the infrastructure because of its non-reparability. Proper functioning of bridges is also essential in the aftermath of an earthquake. In order to mitigate pounding and unseating damage of bridges subjected to earthquakes, a self-adaptive Ni-Ti shape memory alloy (SMA)-cable-based frictional sliding bearing (SMAFSB) is proposed considering self-adaptive centering, high energy dissipation, better fatigue, and corrosion resistance from SMA-cable component. The developed novel bearing is associated with the properties of modularity, replaceability, and earthquake isolation capacity, which could reduce the repair time and increase the resilience of highway bridges. To evaluate the super-elasticity of the SMA-cable, pseudo-static tests and numerical simulation on the SMA-cable specimens with a diameter of 7 mm are conducted and one dimensional (1D) constitutive hysteretic model of the SMAFSB is developed considering the effects of gap, self-centering, and high energy dissipation. Two types of the SMAFSB (i.e., movable and fixed SMAFSBs) are applied to a two-span continuous reinforced concrete (RC) bridge. The seismic vulnerabilities of the RC bridge, utilizing movable SMAFSB with the constant gap size of 60 mm and the fixed SMAFSBs with different gap sizes (e.g., 0, 30, and 60 mm), are assessed at component and system levels, respectively. It can be observed that the fixed SMAFSB with a gap of 30 mm gained the most retrofitting effect among the three cases.

• Smart Structures and Systems
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• v.21 no.4
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• pp.479-491
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• 2018

Shape memory alloys (SMA) exhibit superelasticity which refers to the capability of entirely recovering large deformation upon removal of applied forces and dissipating input energy during the cyclic loading reversals when the environment is above the austenite finish temperature. This property is increasingly favored by the earthquake engineering community, which is currently developing resilient structures with prompt recovery and affordable repair cost after earthquakes. Compared with the other SMAs, NiTi SMAs are widely deemed as the most promising candidate in earthquake engineering. This paper contributes to evaluate the seismic performance of properly designed concentrically braced frames (CBFs) equipped with NiTi SMA braces under earthquake ground motions corresponding to frequently-occurred, design-basis and maximum-considered earthquakes. An ad hoc seismic design approach that was previously developed for structures with idealized SMAs was introduced to size the building members, by explicitly considering the strain hardening characteristics of NiTi SMA particularly. The design procedure was conducted to compliant with a suite of ground motions associated with the hazard level of design-basis earthquake. A total of four six-story CBFs were designed by setting different ductility demands for SMA braces while designating with a same interstory drift target for the structural systems. The analytical results show that all the designed frames successfully met the prescribed seismic performance objectives, including targeted maximum interstory drift, uniform deformation demand over building height, eliminated residual deformation, controlled floor acceleration, and slight damage in the main frame. In addition, this study indicates that the strain hardening behavior does not necessarily impose undesirable impact on the global seismic performance of CBFs with SMA braces.