• International Journal of Computer Science & Network Security
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• v.22 no.4
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• pp.89-100
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• 2022

With the advancement in the Internet of things Technology (IoT) cloud computing, billions of physical devices have been interconnected for sharing and collecting data in different applications. Despite many advancements, some latency - specific application in the real world is not feasible due to existing constraints of IoT devices and distance between cloud and IoT devices. In order to address issues of latency sensitive applications, fog computing has been developed that involves the availability of computing and storage resources at the edge of the network near the IoT devices. However, fog computing suffers from many limitations such as heterogeneity, storage capabilities, processing capability, memory limitations etc. Therefore, it requires an adequate task scheduling method for utilizing computing resources optimally at the fog layer. This work presents a comprehensive review of different task scheduling methods in fog computing. It analyses different task scheduling methods developed for a fog computing environment in multiple dimensions and compares them to highlight the advantages and disadvantages of methods. Finally, it presents promising research directions for fellow researchers in the fog computing environment.

• International journal of advanced smart convergence
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• v.11 no.1
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• pp.28-35
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• 2022

This paper presents a performance evaluation of real-time Linux for industrial real-time platforms. On industrial platforms, multicore processors are popular due to their work distribution efficiency and cost-effectiveness. Multicore processors, however, are not designed for applications with real-time constraints, and their performance capabilities depend on their core configurations. In order to assess the feasibility of a multicore processor for real-time applications, we conduct a performance evaluation of a general processor and a low-power processor to provide an experimental environment of real-time Linux on both Xenomai and RT-preempt considering the multicore configuration. The real-time performance is evaluated through scheduling latency and in an environment with loads on the CPU, memory, and network to consider an actual situation. The results show a difference between a low-power and a general-purpose processor, but from developer's point of view, it shows that the low-power processor is a proper solution to accommodate low power situations.

• Journal of KIISE:Software and Applications
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• v.31 no.6
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• pp.829-839
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• 2004

Methods based on integer programming have been shown to be very effective in solving various crew pairing optimization problems. However, their applicability is limited to problems with linear constraints and objective functions. Also, those methods often require an unacceptable amount of time and/or memory resources given problems of larger scale. Heuristic methods such as neighborhood search, on the other hand, can handle large-scaled problems without too much difficulty and can be applied to problems having any form of objective functions and constraints. However, neighborhood search often gets stuck at local optima when faced with complex search spaces. This paper presents ,i hybrid algorithm of neighborhood search and integer programming, which nicely combines the advantages of both methods. The hybrid algorithm has been successfully tested on a large-scaled crew pairing optimization problem for a real subway line.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.11
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• pp.2671-2676
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• 2015

Nowadays, Mobile devices are now capable of supporting a wide range of applications. Unfortunately, some of applications demand an ever increasing computational power and mobile devices have limited resources due to their constraints, such as low processing power, limited memory, unpredictable connectivity, and limited battery life. To deal with mobile devices' constraints, researchers envision extending cloud computing services to mobile devices using virtualization techniques to shift the workload from mobile devices to a powerful computational infrastructure. Those techniques consist of migrating resource-intensive computations from a mobile device to the resource-rich cloud, or server (called nearby infrastructure). In this paper, we want to highlight on cloudlet architecture (nearby infrastructure with mobile devices), its functioning and in our future work, analyze effects of distance between cloudlet and mobile devices.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.7
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• pp.12-19
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• 2020

The clustered heterogeneous wireless sensor network is comprised of sensor nodes and cluster heads, which are hierarchically organized for different objectives. In the network, we should especially take care of managing node resources to enhance network performance based on memory and battery capacity constraints. For instances, if some interesting events occur frequently in the vicinity of particular sensor nodes, those nodes might receive massive amounts of data. Data congestion can happen due to a memory bottleneck or link disconnection at cluster heads because the remaining memory space is filled with those data. In this paper, we utilize drones as mobile sinks to resolve data congestion and model the network, sensor nodes, and cluster heads. We also design a cost function and a congestion indicator to calculate the degree of congestion. Then we propose a data congestion map index and a data congestion mapping scheme to deploy drones at optimal points. Using control variable, we explore the relationship between the degree of congestion and the number of drones to be deployed, as well as the number of drones that must be below a certain degree of congestion and within communication range. Furthermore, we show that our algorithm outperforms previous work by a minimum of 20% in terms of memory overflow.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.10
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• pp.5149-5167
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• 2017

Reducing energy consumption in a wireless video sensor network (WVSN) is a crucial problem because of the high video data volume and severe energy constraints of battery-powered WVSN nodes. In this paper, we present an adaptive dynamic resizing approach for a SRAM communication buffer in a WVSN node in order to reduce the energy consumption and thereby, to maximize the lifetime of the WVSN nodes. To reduce the power consumption of the communication part, which is typically the most energy-consuming component in the WVSN nodes, the radio needs to remain turned off during the data buffer-filling period as well as idle period. As the radio ON/OFF transition incurs extra energy consumption, we need to reduce the ON/OFF transition frequency, which requires a large-sized buffer. However, a large-sized SRAM buffer results in more energy consumption because SRAM power consumption is proportional to the memory size. We can dynamically adjust any active buffer memory size by utilizing a power-gating technique to reflect the optimal control on the buffer size. This paper aims at finding the optimal buffer size, based on the trade-off between the respective energy consumption ratios of the communication buffer and the radio part, respectively. We derive a formula showing the relationship between control variables, including active buffer size and total energy consumption, to mathematically determine the optimal buffer size for any given conditions to minimize total energy consumption. Simulation results show that the overall energy reduction, using our approach, is up to 40.48% (26.96% on average) compared to the conventional wireless communication scheme. In addition, the lifetime of the WVSN node has been extended by 22.17% on average, compared to the existing approaches.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.1
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• pp.48-59
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• 2015

In recent years, there are increasing threats of rootkits that undermine the integrity of a system by manipulating OS kernel. To cope with the rootkits, in Vigilare, the snoop-based monitoring which snoops the memory traffics of the host system was proposed. Although the previous work shows its detection capability and negligible performance loss, the problem is that the proposed design is not acceptable in recent commodity mobile application processors (APs) which have become de facto the standard computing platforms of smart devices. To mend this problem and adopt the idea of snoop-based monitoring in commercial products, in this paper, we propose a snoop-based monitor design called S-Mon, which is designed for the AP platforms. In designing S-Mon, we especially consider two design constraints in the APs which were not addressed in Vigilare; the unified memory model and the crossbar switch interconnect. Taking into account those, we derive a more realistic architecture for the snoop-based monitoring and a new hardware module, called the region controller, is also proposed. In our experiments on a simulation framework modeling a productionquality device, it is shown that our S-Mon can detect the rootkit attacks while the runtime overhead is also negligible.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.2
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• pp.97-105
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• 2015

This paper discusses the implementation of Bruun's FFT on a SIMD processor. FFT is an algorithm used in digital signal processing area and its effective processing is important in the enhancement of signal processing performance. Bruun's FFT algorithm is one of fast Fourier transform algorithms based on recursive factorization. Compared to popular Cooley-Tukey algorithm, it is advantageous in computations because most of its operations are based on real number multiplications instead of complex ones. However it shows more complicated data alignment patterns and requires a larger memory for storing coefficient data in its implementation on a SIMD processor. According to our experiment result, in the processing of the FFT with 1024 complex input data on a SIMD processor, The Bruun's algorithm shows approximately 1.2 times higher throughput but uses approximately 4 times more memory (20 Kbyte) than the Cooley-Tukey algorithm. Therefore, in the case with loose constraints on silicon area, the Bruun's algorithm is proper for the processing of FFT on a SIMD processor.

• Journal of Internet Computing and Services
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• v.10 no.4
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• pp.35-44
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• 2009

The emerging notion of data stream has brought many new challenges to the research communities as a consequence of its conceptual difference with conventional concepts of just data. One typical example is data stream processing in sensor networks. The range of data processing considerations in a sensor network is very wide, from physical resource restrictions such as bandwidth, energy, and memory to the peculiarities of query processing including continuous and specific types of queries. In this paper, as one of the physical constraints in data stream processing, we consider the problem of limited memory and propose a new scheme for data stream reduction based on the Principal Component Analysis (PCA) technique. PCA can transform a number of (possibly) correlated variables into a (smaller) number of uncorrelated variables. We adapt PCA for the data stream of a sensor network assuming the cooperation of a query engine (or application) with a network base station. Our method exploits the spatio-temporal correlation among multiple measurements from different sensors. Finally, we present a new framework for data processing and describe a number of experiments under this framework. We compare our scheme with the wavelet transform and observe the effect of time stamps on the compression ratio. We report on some of the results.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.4
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• pp.712-720
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• 1994

In digital mobile communication systems, the convolutional coding is considered as the optimum error correcting scheme. Recently, the Viterbi algorithm is widely used for the decoding of convolutional code. Most Viterbi decoder has been proposed in conde rate R=1/2 or 2/3 with memory components (m) less than 3. which degrades the error correcting capability because of small code constraints (K). We consider the design method for typical code rate R=1/2, K=7(171,133) convolutional code with memory components, m=6. In this paper, a novel construction method is presented which combines maximum likelihood decoding with a state transition double detection and comparison method. And the designed circuit has the error-correcting capability of random 2 bit error. As the results of logic simulation, it is shown that the proposed Viterbi decoder exactly corrects 1 bit and 2 bit error signal.