• 전기학회논문지P
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• 제65권4호
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• pp.340-345
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• 2016

Railway vehicle battery is supplying the power required for the initial start-up of the train, in the event of a fault in the vehicle, or catenary for supplying emergency power is one of the components are very important. Currently, the railway vehicles such as nickel-cadmium batteries are being used [1,2]. Ni-Cd batteries as a battery installed in the railway vehicles have a strong corrosion resistance is included, The charge-discharge performance is significantly degraded in cold weather, there is a danger of deterioration or explosion. Train accidents have been caused a lot of damage due to rapid deterioration and cracking of the battery and memory due to the effect of Ni-Cd batteries. In order to solve the problems, There is no risk of degradation, deterioration and leakage, cracking and exploding. maintenance is simple and applied measures proposed to apply Lithium Polymer battery of high performance. In addition, the lack of capacity problems identified by testing the different special systems is replaced by a 70Ah lithium-polymer battery is possible without changing the batteries of 50Ah caused by installing additional equipment in existing older trains were applied to the vehicle.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.70-73
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• 2001

MFIS(Metal-ferroelectric-insulator- semiconductor) structures using silicon oxynitride(SiON) buffer layers were fabricatied and demonstrated nonvolatile memory operations. Oxynitride(SiON) films have been formed on p-Si(100) by RTP(rapid thermal process) in O$_2$+N$_2$ ambient at 1100$^{\circ}C$. The gate leakage current density of Al/SiON/Si(100) capacitor was about the order of 10$\^$-8/ A/cm$^2$ at the range of ${\pm}$ 2.5 MV/cm. The C-V characteristics of Al/LiNbO$_3$/SiON/Si(100) capacitor showed a hysteresis loop due to the ferroelectric nature of the LiNbO$_3$ thin films. Typical dielectric constant value of LiNbO$_3$ film of MFIS device was about 24. The memory window width was about 1.2V at the electric field of ${\pm}$300 kV/cm ranges.

• E2M - 전기 전자와 첨단 소재
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• 제7권2호
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• pp.145-151
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• 1994

The multi-dielectric layer SiOz/Si3N4/SiO2(ONO) is used to scale down the memory device. In this paper, the change of composition in ONO layer due to the process condition and the conduction mechanism are observed. The composition of the oxide film grown through the oxidation of nitride film is analyzed using auger electron spectroscopy(AES). AES results show that oxygen concentration increases at the interface between oxide and nitride layers as the thickness -of the top oxide layer increases. Results of I-V measurement show that the insulating properties improve as the thickness of the top oxide layer increases. But when the thickness of the nitride layer decreases below 63.angs, insulating peoperties of film 28.angs. of top oxide and film 35.angs. turn over showing that insulating property of film 28.angs. of top oxide is better than that of film 35.angs. of top oxide. This phenomenon of turn over is thought as the result of generation of surface state due to oxygen flow into nitride during oxidation process. As the thickness of the top oxide and nitride increases, the electrical breakdown field increases, but when the thickness of top oxide reaches 35.angs, the same phenomenon of turn over occurs. Optimum film thickness for scaled multi-layer dielectric of memory device SONOS is estimated to be 63.angs. of nitride layer and 28.angs. of top oxide layer. In this case, maximum electrical breakdown field and leakage current are 18.5[MV/cm] and $8{\times}{10^-12}$[A], respectively.

• 한국전기전자재료학회논문지
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• 제17권12호
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• pp.1283-1288
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• 2004

Metal-ferroelectric-insulator-semiconductor(WFIS) capacitors using rapid thermal annealed LiNbO$_3$/AlN/Si(100) structure were fabricated and demonstrated nonvolatile memory operations. The capacitors on highly doped Si wafer showed hysteresis behavior like a butterfly shape due to the ferroelectric nature of the LiNbO$_3$ films. The typical dielectric constant value of LiNbO$_3$ film in the MFIS device was about 27, The gate leakage current density of the MFIS capacitor was 10$^{-9}$ A/cm$^2$ order at the electric field of 500 kV/cm. The typical measured remnant polarization(2P$_{r}$) and coercive filed(Ec) values were about 1.2 $\mu$C/cm$^2$ and 120 kV/cm, respectively The ferroelectric capacitors showed no polarization degradation up to 10$^{11}$ switching cycles when subjected to symmetric bipolar voltage pulses of 1 MHz. The switching charges degraded only by 10 % of their initial values after 4 days at room temperature.e.

• 대한임베디드공학회논문지
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• 제11권2호
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• pp.67-78
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• 2016

The emerging Spin-Transfer Torque RAM (STT-RAM) is a promising component that can be used to improve the efficiency as a result of its high storage density and low leakage power. However, the state-of-the-art STT-RAM is not ready to replace SRAM technology due to the negative effect of its write operations. The write operations require longer latency and more power than the same operations in SRAM. Therefore, a hybrid cache with SRAM and STT-RAM technologies is proposed to obtain the benefits of STT-RAM while minimizing its negative effects by using SRAM. To efficiently use of the hybrid cache, it is important to place write intensive data onto the cache. Such data should be placed on SRAM to minimize the negative effect. Thus, we propose a technique that optimizes placement of data in main memory. It drives the proper combination of advantages and disadvantages for SRAM and STT-RAM in the hybrid cache. As a result of the proposed technique, write intensive data are loaded to SRAM and read intensive data are loaded to STT-RAM. In addition, our technique also optimizes temporal locality to minimize conflict misses. Therefore, it improves performance and energy consumption of the hybrid cache architecture in a certain range.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2010년도 제39회 하계학술대회 초록집
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• pp.196-197
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• 2010

NAND형 charge trap flash (CTF) non-volatile memory (NVM) 소자가 30nm node 이하로 고집적화 되면서, 기존의 SONOS형 CTF NVM의 tunnel barrier로 쓰이는 SiO2는 direct tunneling과 stress induced leakage current (SILC)등의 효과로 인해 data retention의 감소 등 물리적인 한계에 이르렀다. 이에 따라 개선된 retention과 빠른 쓰기/지우기 속도를 만족시키기 위해서 tunnel barrier engineering (TBE)가 제안되었다. TBE NVM은 tunnel layer의 전위장벽을 엔지니어드함으로써 낮은 전압에서 전계의 민감도를 향상 시켜 동일한 두께의 단일 SiO2 터널베리어 보다 빠른 쓰기/지우기 속도를 확보할 수 있다. 또한 최근에 각광받는 high-k 물질을 TBE NVM에 적용시키는 연구가 활발히 진행 중이다. 본 연구에서는 Si3N4와 HfAlO (HfO2 : Al2O3 = 1:3)을 적층시켜 staggered의 새로운 구조의 tunnel barrier Capacitor를 제작하여 전기적 특성을 후속 열처리 온도와 방법에 따라 평가하였다. 실험은 n-type Si (100) wafer를 RCA 클리닝 실시한 후 Low pressure chemical vapor deposition (LPCVD)를 이용하여 Si3N4 3 nm 증착 후, Atomic layer deposition (ALD)를 이용하여 HfAlO를 3 nm 증착하였다. 게이트 전극은 e-beam evaporation을 이용하여 Al를 150 nm 증착하였다. 후속 열처리는 수소가 2% 함유된 질소 분위기에서 $300^{\circ}C$와 $450^{\circ}C$에서 Forming gas annealing (FGA) 실시하였고 질소 분위기에서 $600^{\circ}C{\sim}1000^{\circ}C$까지 Rapid thermal annealing (RTA)을 각각 실시하였다. 전기적 특성 분석은 후속 열처리 공정의 온도와 열처리 방법에 따라 Current-voltage와 Capacitance-voltage 특성을 조사하였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.446-446
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• 2012

최근 반도체 칩의 트랜지스터 집적화 기술이 발달됨에 따라 dynamic random access memory(DRAM)의 memory cell 영역을 작게 만들어야 하는 문제가 제기되고 있다. 이러한 문제점을 해결하기 위해서 대체 기술이 끊임없이 연구되고 있는 가운데 하나의 트랜지스터와 하나의 캐패시터로 구성된 기존의 DRAM에서 캐패시터가 없이 하나의 트랜지스터만으로 이루어진 1T-DRAM 소자의 연구가 활발히 진행되고 있다. 이는 기존 DRAM의 구조에 비해 캐패시터가 필요하지 않아 복잡한 공정이 줄어들어 소자 제작이 용이하며, 더 높은 집적도를 구현할 수 있는 장점이 있다. 일반적인 planar 타입의 1T-DRAM의 경우 소스 및 드레인과 기판과의 접합면에서 누설 전류가 큰 특징을 가지며 소자의 집적화에 따른 단 채널 효과가 발생하게 되는데, 본 연구에서는 이러한 문제점을 해결하기 위해서 유효 채널 길이를 늘려 단 채널 효과에 의한 영향을 감소시키고, 소스 및 드레인과 기판과의 접합면을 줄여 누설 전류를 줄일 수 있는 recessed 채널 타입의 1T-DRAM을 제작하였다. 1T-DRAM의 메모리 구동방법에는 여러 가지가 있는데 본 연구에서는 impact ionization (II)을 이용한 방법과 gate induced drain leakage (GIDL)을 이용한 방법을 사용하여 1T-DRAM의 채널구조에 따라 어떠한 구동방법이 더 적합한지 평가하였고, 그 결과 recessed 채널 1T-DRAM의 동작은 II 에 의한 측정 방법이 더 적합한 것으로 보여졌다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1998년도 춘계학술대회 논문집
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• pp.235-238
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• 1998

Ferroelectric $LiNbO_3$ thin films were grown directly on Si(100) substrates by 13.55MHz RF magnetron sputtering system using a ceramic target ($Nb_2O_5/Li_2C0_3$ = 51.4/48.6). Because high temperature process have to avoided to prevent degradation of the interface (insulator/Si), $LiNbO_3$ thin films were deposited below $300^{\circ}C$. After as-deposited films were performed RTA treatments in an oxygen ambient at $600^{\circ}C$ for 60s, electrical measurements performed films before and after anneal treatment. In high field region, the leakage current density of the films after annealing was deceased about 4order and the resistivity of these was increased to about 5\times 10^{11} \Omega \cdot cm$ at 500kV/cm. In accumulation region of C-V curve, we calculated dielectric constant of thin film $LiNbO_3$ as 27.9 which is close to that of bulk value.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 하계학술대회 논문집 C
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• pp.1562-1564
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• 2003

In this study, PZT thin films were fabricated using sol-gel processing onto Si/$SiO_2$/Ti/Pt substrates. PZT sol with different Zr/Ti ratio(20/80, 30/70, 40/60, 52/48) were prepared, respectively. The films were fabricated by using the spin-coating method on substrates. The films were heat treated at $450^{\circ}C,\;650^{\circ}C$ by rapid thermal annealing(RTA). The preferred orientation of the PZT thin films were observed by X-ray diffraction(XRD), and Scanning electron microscopy(SEM). All of the resulting PZT thin films were crystallized with perovskite phase. The fine crystallinity of the films were fabricated. Also, we found that the ferroelectric properties from the dielectric constant of the PZT thin films were over 600 degrees, P-E hysteresis constant. And the leakage current densities of films were lower than $10^{-8}A/cm^2$. It is concluded that the PZT thin films by sol-gel process to be convinced of application for ferroelectric memory device.

• 비파괴검사학회지
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• 제26권2호
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• pp.99-107
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• 2006

자기적인 방법을 이용한 비파괴검사는 강자성체 표면 및 표면 근방의 균열을 탐상하는데 매우 유용하다. 균열을 평가하기 위해서는 시험편상의 누설자속분포를 정량적으로 취득해야 한다. 자기카메라는 큰 리프트오프에서 누설자속분포를 얻기 위하여 제안되었다. 자기카메라는 지원, 자기렌즈, AD 변환기, 인터페이스 및 컴퓨터로 구성되어 있다. 측정 대상체로부터 누설된 자속 또는 흐트러진 자장은 지기렌즈로 집속된 후, 배열된 작은 지기센서에 의하여 아날로그신호로 변환된다. 이러한 아날로그 신호는 AD 변환기에 의하여 디지털신호로 변환되고, 인터페이스 및 컴퓨터에 의하여 저장, 영상화 및 처리된다. 그러나, 지급까지의 자기카메라는 범용 AD변환기를 사용하기 때문에 변환 및 스위칭속도, 검출범위 및 분해능, 직접 메모리 액세스(DMA, direct memory access), 임시저장속도 및 저장량에 한계점을 가지고 있었다. 또한, S/N비를 높이기 위하여 OP-AMP의 도입, 신호의 증폭, 배선의 감소, LPF의 사용과 팥은 개선된 기술이 필요하다. 본 논문은 상술한 조건들을 만족하기 위하여 OP-AMP, LPF, 마이크로프로세서 및 DMA 회로를 포함한 자기카메라 전용 임베디드형 AD 변환기를 제안한다.