• Proceedings of the KSRS Conference
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• v.2
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• pp.725-727
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• 2006

The development of GIS and Location-Based Services requires a high-level database that will be able to allow real-time access to moving objects for spatial and temporal operations. MODB.MM is able to meet these requirements quite adequately, providing operations with the abilities of acquiring, storing, and querying large-scale moving objects. It enables a dynamic and diverse query mechanism, including searches by region, trajectory, and temporal location of a large number of moving objects that may change their locations with time variation. Furthermore, MODB.MM is designed to allow for performance upon main memory and the system supports the migration on out-of-date data from main memory to disk. We define the particular query for truncation of moving objects data and design two migration methods so as to operate the main memory moving objects database system and file-based location storage system with.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.4
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• pp.795-804
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• 2009

An HSS(Home Subscriber Server) system requires a main-memory database on main-memory unit for the real-tine management of the subscriber information in the mobile communication service, in that the system controls not only basic data for handling calls of users, but also additional service data related to user authentication and operational data. Nonetheless, HSS-DBS system, requiring the reliability and stability, need more secure data store method and a back-up technique because the system have a long startup time and the big problem on the failures of main-memory. This paper proposes an efficient back-up replication technique, on the basis of enhancing the stability and performance of HSS system. The proposed shadowing back-up technique adopting the delayed recovery process, can help minimize the real-time back-up overloads by location registration, while the proposed backup replication method enables more stable system operations with replicating the data to remote server in real time.

• Journal of the Korean Society for Industrial and Applied Mathematics
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• v.7 no.1
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• pp.7-14
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• 2003

The main concern of this paper is to develop a new class of quasi-newton methods. These methods are intended for use whenever memory space is a major concern and, hence, they are usually referred to as limited memory methods. The methods developed in this work are sensitive to the choice of the memory parameter ${\eta}$ that defines the amount of past information stored within the Hessian (or its inverse) approximation, at each iteration. The results of the numerical experiments made, compared to different choices of these parameters, indicate that these methods improve the performance of limited memory quasi-Newton methods.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.28B no.9
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• pp.703-711
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• 1991

In this paper, an efficient storage reclamation algorithm for RISC parallel processing in the object orented programming environments is presented. The memory management for the dynamic memory allocation and the frequent memory access in object oriented programming is the main factor that decreases RISC parallel processing performance. The proposed algorithm can be efficiently allocated the memory space of RISCy computer which is required the frequent memory access, so it can be increased RISC parallel processing performance. The proposed algorithm is verified the efficiency by implementing C language on SUN SPARC(4.3 BSD UNIX).

• Journal of IKEEE
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• v.25 no.1
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• pp.180-192
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• 2021

One widely used algorithm for image recognition and pattern detection is the convolution neural network (CNN). To efficiently handle convolution operations, which account for the majority of computations in the CNN, we use hardware accelerators to improve the performance of CNN applications. In using these hardware accelerators, the CNN fetches data from the off-chip DRAM, as the massive computational volume of data makes it difficult to derive performance improvements only from memory inside the hardware accelerator. In other words, data communication between off-chip DRAM and memory inside the accelerator has a significant impact on the performance of CNN applications. In this paper, a simulator for the CNN is developed to analyze the main memory or DRAM access with respect to the size of the on-chip memory or global buffer inside the CNN accelerator. For AlexNet, one of the CNN architectures, when simulated with increasing the size of the global buffer, we found that the global buffer of size larger than 100kB has 0.8x as low a DRAM access count as the global buffer of size smaller than 100kB.

• Structural Engineering and Mechanics
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• v.53 no.5
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• pp.1031-1049
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• 2015

This paper highlights the role of innovative vibration control system based on two promising properties in a parallel configuration. Hybrid device consists of two main components; recentering wires of shape memory alloy (SMA) and steel pipe section as an energy dissipater element. This approach concentrates damage in the steel pipe and prevents the main structural members from yielding. By regulation of the main adjustable design parameter, an optimum performance of the device is obtained. The effectiveness of the device in passive control of structures is evaluated through nonlinear time history analyses of a five-story steel frame with and without the hybrid device. Comparing the results proves that the hybrid device has a considerable potential to mitigate the residual drift ratio, peak absolute acceleration and peak interstory drift of the structure.

• The Journal of Information Technology and Database
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• v.8 no.2
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• pp.103-114
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• 2001

In this paper, we propose an efficient index mechanism for real-time main memory database systems. Existing main memory index structures based on the tree can effectively support range searches. However, it doesn't guarantee the real-time characteristic because difference between the access time of a node and an average access time can be high. The index structures based on the hash have always a regular random access time on the simple searches and that speed is very fast. However they do not support range searches. To solve such problems, we propose a new index mechanism called Hyper Tree-Hash (Hyper-TH) that combines ECBH (Extendible Chained Bucket Hashing) and T＊-tree. ECBH can be dynamically extended and has a very fast access time. T＊-tree effectively supports the range searches. We show through our experiments that the proposed mechanism outperforms existing other index structures.

• 전기의세계
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• v.26 no.1
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• pp.71-76
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• 1977

It has been expected that the 4th generation computers will be characterized for their problem adaptability. There are few techniques of implementing such a characteristic. One of the techniques that one have considered in this paper the user microprogrammable computer architecture. There are two different computer architectures that support user microprogramming. One uses the writeable control storage and another uses the main memory. The concept of utilizing writeable control storage for microprogramming was developed in 1950's and since then the most of the user microprogrammable computers produced belong to such category. The concept of utilizing the main memory for user microprogramming was first introduced by Thomas in 1973. This architecture has a strong advantage in the aspect of the system cost. In this paper, we have developed a user microprogrammable computer. The computer utilizes the main memory for user microprograms. It employs a 32 bit micro-instruction word in the form of the little encoded. The performance of the developed machine will be evaluated in the hard ware cost, programming easiness and the running time.

• ETRI Journal
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• v.35 no.5
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• pp.808-818
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• 2013

Programmable memory built-in self-test (PMBIST) is an attractive approach for testing embedded memory. However, the main difficulties of the previous works are the large area overhead and low flexibility. To overcome these problems, a new flexible PMBIST (FPMBIST) architecture that can test both single-port memory and dual-port memory using various test algorithms is proposed. In the FPMBIST, a new instruction set is developed to minimize the FPMBIST area overhead and to maximize the flexibility. In addition, FPMBIST includes a diagnostic scheme that can improve the yield by supporting three types of diagnostic methods for repair and diagnosis. The experiment results show that the proposed FPMBIST has small area overhead despite the fact that it supports various test algorithms, thus having high flexibility.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.245-248
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• 1998

Until now, to solve the problem, the lack of memory at TDX-10A ESS (Electronic Switching System), we have extended only main memory of the systems. However, this method is useful for only Transitcall Processing Subsystems and, it is not an effective way that is able to apply to all Subsystems of ESS because of the financial aspect. In this paper, we will introduce a new method which uses Non-Resident Program. This method utilizes main memory more effectively. We will also analyze the effectiveness resulting from test of new method applied to TDX-10A ESS.