• ETRI Journal
• /
• v.42 no.4
• /
• pp.534-548
• /
• 2020

This study presents a new architecture for a field programmable analog array (FPAA) for use in low-frequency applications, and a generalized circuit realization method for the implementation of nth-order elliptic filters. The proposed designs of both the FPAA and elliptic filters are based on the operational transconductance amplifier (OTA) used in implementing OTA-C filters for biopotential signal processing. The proposed FPAA architecture has a flexible, expandable structure with direct connections between configurable analog blocks (CABs) that eliminates the use of switches. The generalized elliptic filter circuit realization provides a simplified, direct synthetic method for an OTA-C symmetric balanced structure for even/odd-nth-order low-pass filters (LPFs) and notch filters with minimum number of components, using grounded capacitors. The filters are mapped on the FPAA, and both architectures are validated with simulations in LTspice using 90-nm complementary metal-oxide semiconductor (CMOS) technology. Both proposed FPAA and filters generalized synthetic method achieve simple, flexible, low-power designs for implementation of biopotential signal processing systems.

• Journal of Sensor Science and Technology
• /
• v.3 no.1
• /
• pp.54-60
• /
• 1994

In this paper, the multi-sensor signal processing IC is designed. It consists of an analog multiplexer for selection of multi-sensor signals, active filters for noise rejection and signal amplification, and a sample and hold circuit for interface with digital signal processing. By implementing these circuits with CMOS transistors, integration, low power dissipation and miniaturization of the total signal processing system have been made possible.

• Proceedings of the KIEE Conference
• /
• 2004.07c
• /
• pp.1963-1966
• /
• 2004

An ultra wide band ultra-high frequency (UHF) signal processing module was designed for on-line UHF partial discharge (PD) monitoring systems for gas-insulated switchgears (GIS). Major advantage of the unit is an improved PD detection sensitivity through minimizing the effect of surrounding interference signals. The detection sensitivity of the unit was <-60 dBm that is sufficient to detect UHF PD signals as low as 1 pC. Precise detection of PD occurred in the GIS, due to internal defects, is possible by using the signal processing unit.

• Proceedings of the KIEE Conference
• /
• 2004.05b
• /
• pp.128-131
• /
• 2004

An ultra wide band ultra-high frequency (UHF) signal processing module was designed for on-line UHF partial discharge (PD) monitoring systems for gas-insulated switchgears (GIS). Major advantage of the unit is an improved PD detection sensitivity through minimizing the effect of surrounding interference signals. The detection sensitivity of the unit was <-60 dBm that is sufficient to detect UHF PD signals as low as 1 pC. Precise detection of PD occurred in the GIS, due to internal defects, is possible by using the signal processing unit.

• ETRI Journal
• /
• v.27 no.5
• /
• pp.539-544
• /
• 2005

An analog CMOS vision chip for edge detection with power consumption below 20mW was designed by adopting electronic switches. An electronic switch separates the edge detection circuit into two parts; one is a logarithmic compression photocircuit, the other is a signal processing circuit for edge detection. The electronic switch controls the connection between the two circuits. When the electronic switch is OFF, it can intercept the current flow through the signal processing circuit and restrict the magnitude of the current flow below several hundred nA. The estimated power consumption of the chip, with $128{\times}128$ pixels, was below 20mW. The vision chip was designed using $0.25{\mu}m$ 1-poly 5-metal standard full custom CMOS process technology.

• ETRI Journal
• /
• v.45 no.4
• /
• pp.570-580
• /
• 2023

Sensor nodes are the most significant part of a wireless sensor network that offers a powerful combination of sensing, processing, and communication. One major challenge while designing a sensor node is power consumption, as sensor nodes are generally battery-operated. In this study, we proposed the design of a low-power, long range-based wireless sensor node with flexibility, a compact size, and energy efficiency. Furthermore, we improved power performance by adopting an efficient hardware design and proper component selection. The Nano Power Timer Integrated Circuit is used for power management, as it consumes nanoamps of current, resulting in improved battery life. The proposed design achieves an off-time current of 38.17309 nA, which is tiny compared with the design discussed in the existing literature. Battery life is estimated for spreading factors (SFs), ranging from SF7 to SF12. The achieved battery life is 2.54 years for SF12 and 3.94 years for SF7. We present the analysis of current consumption and battery life. Sensor data, received signal strength indicator, and signal-to-noise ratio are visualized using the ThingSpeak network.

• Journal of the Institute of Convergence Signal Processing
• /
• v.16 no.3
• /
• pp.115-121
• /
• 2015

A device which could cut off the consumption of standby power by electric or electronic devices at homes and offices while waiting for a command to carry out the main functions from the inside or the outside was developed at a low price. Efforts to save standby power have been made on a global scale as well as by advanced countries. The consumption of standby power in South Korea is also increasing gradually due to increasing trend in the number of electronic and electric devices per household, becoming a major factor for waste of electric energy. The previous standby power cutoff devices themselves have high electric energy consumption and complicated structures, making the purpose less meaningful. Therefore, a low-priced standby power cutoff device is suggested in this study, which compensates such problems and cuts off the consumption of standby power completely. The circuit of the suggested standby power cutoff device was designed and implemented by applying it to an earth leakage breaker and an (electrical) outlet. Experimental results show its superiority.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.43 no.6 s.348
• /
• pp.38-46
• /
• 2006

A parallel analog Viterbi decoder which decodes PRML signal of DVD has been fabricated into a VLSI chip. The parallel analog Viterbi decoder implements the functions of the conventional digital Viterbi decoder utilizing the analog parallel processing circuit technology. In this paper, the analog parallel Viterbi decoding technology is applied for the PRML signal decoding of DVD. The benefits are low power consumption and less silicon consumption. The designed circuits are analysed and the test results of the fabricated chip are reported.

• 제어로봇시스템학회:학술대회논문집
• /
• 2003.10a
• /
• pp.49-52
• /
• 2003

Two types of ozone monitors using UV absorption method were tried in consideration of cost of the monitor and precision in measuring. The high concentration ozone monitor for high concentration real time ozone monitoring from ozone generator was composed of a low pressure mercury lamp as UV source, a photo multiplier tube as UV detector and signal processing unit for the most part. This structure could be very useful for low price high concentration ozone monitor due to simple system structure and fairly good monitoring characteristics. The developed system showed good linear output characteristics to ozone in the measuring concentration range of 0.05 and 2 wt.%. For accuracy ambient ozone monitoring in ambient in ppm level, the system composed of a high power pulsed xenon lamp as UV source, an optical spectrometer with a high sensitivity linear CCD array as UV detector and signal processing unit in brief speaking was proposed our study for the first time in the world. The developed system showed good linearity and sensitivity in relative low measuring range between 10ppm and 10,000ppm, and showed some feasibility of high resolution ozone monitor using CCD array as photodetector.

• Proceedings of the KIEE Conference
• /
• 2002.11c
• /
• pp.114-117
• /
• 2002

The airborne tracking radar is located in front of aircraft or missile and measures and tracks a target motion. The signal processor receives target signals from a receiver using A/D converters, and calculates the target motion, and transfers the data to the aircraft or missile control unit. Since the signal processing system is required to be lightweight and small size as well as high performance to calculate and analyze the received signal, we use high speed DSPs and SMD type components having low power consumption. In this paper, we describe the design concept of signal processing system of the airborne tracking radar.