• The KIPS Transactions:PartA
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• v.14A no.6
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• pp.347-356
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• 2007

In designing a branch predictor, in addition to accuracy, microarchitects should consider power consumption, especially for embedded processors. This paper proposes a power-aware branch predictor, which is based on the gshare predictor, by accessing the BTB (Branch Target Buffer) only when the prediction from the PHT (Pattern History Table) is taken. To enable the selective access to the BTB, the PHT in the proposed branch predictor is accessed one cycle earlier than the traditional PHT to prevent the additional delay. As a side effect, two predictions from the PHT are obtained through one access to the PHT, which leads to more power savings. The proposed branch predictor reduces the power consumption, not requiring any additional storage arrays, not incurring additional delay (except just one MUX delay) and never harming accuracy. Simulation results show that the proposed predictor reduces the power consumption by $35{\sim}48%$ compared to the traditional predictor.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.28 no.1
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• pp.61-71
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• 2018

In the Internet of Things, in which plenty of devices have connection to each other, cryptographically secure Random Number Generators (RNGs) are essential. Particularly, entropy source, which is the only one non-deterministic part in generating random numbers, has to equip with an unpredictable noise source(or more) for the required security strength. This might cause an requirement of additional hardware extracting noise source. Although additional hardware resources has better performance, it is needed to make the best use of existing resources in order to avoid extra costs, such as area, power consumption. In this paper, we suggest an entropy source which uses a multi-threaded program without any additional hardware. As a result, it reduces the difficulty when implementing on lightweight, low-power devices. Additionally, according to NIST's entropy estimation test suite, the suggested entropy source is tested to be secure enough for source of entropy input.

• Smart Media Journal
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• v.13 no.5
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• pp.19-25
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• 2024

The biggest type of behavior that prevents people with developmental disabilities from entering society is aggressive behavior. Aggressive behavior can pose a threat not only to the personal safety of the person with a developmental disability, but also to the physical safety of others. In this study, we propose a wearable system using a low-power processor. The proposed system uses an IMU (Inertial Measurement Unit) to analyze user behavior, and when attack behavior is not detected for a certain period of time through an LED array attached to the developed system, an interesting LED is displayed. By expressing patterns, we provide behavioral intervention through compensation to people with developmental disabilities. In order to implement a system that must be worn for a long time in a power-limited environment, we present a method to optimize performance and energy consumption across all stages, from data preprocessing to AI model application.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.1
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• pp.106-113
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• 2003

In this paper, we proposed low noise amplifier for 2.4GHz ISM frequency with CMOS technology. The property of noise and gain is improved by cascode architecture. The architecture, which common source output of cascode is connected to input of parallel MOS, reduce IM. The LNA results based on Hynix 0.35${\mu}{\textrm}{m}$ 2poly 4metal CMOS processor with a 3.3V supply. It achieves a gain of 13dB, noise figure of 1.7dB, IP3 of 8dBm, Input/output matching of -31dB/-28dB, reverse isolation of -25dB. and power dissipation of 4.7mW with HSPICE simulation. The size of layout is smaller than 2 ${\times}$ 2mm with Mentor.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.12
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• pp.1678-1687
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• 2013

This paper describes a prototype of 3-phase 3.3kV/220V 6kVA modular semiconductor transformer developed in the lab for feasibility study. The developed prototype is composed of three single-phase units coupled in Y-connection. Each single-phase unit with a rating of 1.9kV/127V 2kVA consists of a high-voltage high-frequency resonant AC-DC converter, a low-voltage hybrid-switching DC-DC converter, and a low-voltage hybrid-switching DC-AC converter. Also each single-phase unit has two DSP controllers to control converter operation and to acquire monitoring data. Monitoring system was developed based on LabView by using CAN communication link between the DSP controller and PC. Through various experimental analyses it was verified that the prototype operates with proper performance under normal and sag condition. The system efficiency can be improved by adopting optimal design and replacing the IGBT switch with the SiC MOSFET switch. The developed prototype confirms a possibility to build a commercial high-voltage high-power semiconductor transformer by increasing the number of series-connected converter modules in high-voltage side and improving the performance of switching element.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.46 no.6
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• pp.153-162
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• 2009

This paper suggests the novel light-weight signal processing algorithm for wireless sensor network applications which needs low computing complexity and power consumption. Exponential average method (EA) is utilized by real time, to process the magnetometer signal which is analyzed to understand the own physical characteristic in time domain. EA provides the robustness about noise, magnetic drift by temperature and interference, furthermore, causes low memory consumption and computing complexity for embedded processor. Hence, optimal parameter of proposal algorithm is extracted by statistical analysis. Using general and precision magnetometer, detection probability over 90% is obtained which restricted by 5% false alarm rate in simulation and using own developed magnetometer H/W, detection probability over 60~70% is obtained under 1~5% false alarm rate in simulation and experiment.

• Journal of Broadcast Engineering
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• v.10 no.3
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• pp.392-400
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• 2005

Highly integrated MPEG-4@SP video compression engine, VideoCore, is proposed for mobile application. The primary components of video compression require the high memory bandwidth since they access the external memory frequently. They include motion estimation, motion compensation, quantization, discrete cosine transform, variable length coding, and so on. The motion estimation processor adopted in VideoCore utilizes the small-size local memories such that the video compression system accesses external memory as less frequently as possible. The entire video compression system is divided into two distinct sub-systems: the integer-unit motion estimation part and the others, and both operate concurrently in a pipelined architecture. Thus the VideoCore enables the real-time high-quality video compression with a relatively low operation frequency.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.2
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• pp.431-438
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• 2017

In this paper, the abdomen ECG(AECG) is employed to measure the mother's ECG instead of the conventioanl thoracic ECG measurement. The fetus ECG signal can be extracted from the AECG using an algorithm that utilizes the mobile fetal ECG measurement platform, which is based on the BLE (Bluetooth Low Energy). The algorithm has been implemented by using a replacement processor processed directly from the platform BLE instead of the large statistical data processing required in the ICA(Independent component analysis). The proposed algorithm can be implemented on a mobile BLE wireless ECG system hardware platform to process the maternal ECG. Wireless technology can realize a compact, low-power radio system for short distance communication and the IOT(Intenet of Things) enables the transmission of real-time ECG data. It was also implemented in the form of a compact module in order for mothers to be able to download and store the collected ECG data without having to interrupt or move the logger, and later link the module to a computer for downloading and analyzing the data. A mobile ECG measurement prototype is manufactured and tested to measure the FECG for pregnant women. The experimental results verify a real-time FECG extraction capability for the proposed system. In this paper, we propose an ECG measurement system that shows approximately 91.65% similarity to the MIT database and the conventional algorithm and SNR performance about 10% better.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.522-525
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• 2006

Recently, mobile devices support multi-functions such as 3D game, wireless internet, moving pictures, DMB, GPS, and PMP. Bigger size of display device is indispensable to support these functions and higher speed of the interface is needed. However, conventional parallel interfaces between processor and display nodule are not competent enough for that high speed transfers. High-speed serial interface is beginning to appear as an alternative for parallel interface. The advantages of the serial interface are high bandwidth, small number of interconnections, low-power consumption, and good quality of electro-magnetic interference. In this paper, we implement serial interface and use it for a display module. LVDS is used for PHY layer and a defined packet is used for link layer. The feature of the implemented serial interface is the reduced number of interconnections with enough bandwidth.

• Journal of the Korea Society of Computer and Information
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• v.17 no.8
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• pp.1-10
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• 2012

This paper proposes design space exploration methodology of many-core processors including multimedia specific instructions to support high-performance and low power ultrasound imaging for portable devices. To explore the impact of multimedia instructions, we compare programs using multimedia instructions and baseline programs with a same many-core processor in terms of execution time, energy efficiency, and area efficiency. Experimental results using a $256{\times}256$ ultrasound image indicate that programs using multimedia instructions achieve 3.16 times of execution time, 8.13 times of energy efficiency, and 3.16 times of area efficiency over the baseline programs, respectively. Likewise, programs using multimedia instructions outperform the baseline programs using a $240{\times}320$ image (2.16 times of execution time, 4.04 times of energy efficiency, 2.16 times of area efficiency) as well as using a $240{\times}400$ image (2.25 times of execution time, 4.34 times of energy efficiency, 2.25 times of area efficiency). In addition, we explore optimal PE architecture of many-core processors including multimedia instructions by varying the number of PEs and memory size.