• Proceedings of the Korean Society of Propulsion Engineers Conference
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• 2004.03a
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• pp.779-783
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• 2004

First this paper introduces an advanced FADEC (Full Authority Digital Electric Control) for current and future jet engines.It is designed to realize not only stable thrust control, but also performance improvement, reliability enhancement, service life extension, etc. It can be built by using current micro-processor with high computational power and there exists no difficulties but reliability problem of the micro- processor. Next, the simulation results of SFC minimization control are shown. The target engine is a supersonic, low-bypass ratio, 2-spool, combined cycle turbofan, designated as HYPR90T, which consists of a turbo engine for under Mach 3 flight and a ram engine for over Mach 3 flight. he results can then be used for performance optimization of the engine, which plays important role in the advanced FADEC.

• Smart Structures and Systems
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• v.6 no.5_6
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• pp.675-687
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• 2010

Structural Health Monitoring (SHM) is the science and technology of monitoring and assessing the condition of aerospace, civil and mechanical infrastructures using a sensing system integrated into the structure. Impedance-based SHM measures impedance of a structure using a PZT (Lead Zirconate Titanate) patch. This paper presents a low-power wireless autonomous and active SHM node called Autonomous SHM Sensor 2 (ASN-2), which is based on the impedance method. In this study, we incorporated three methods to save power. First, entire data processing is performed on-board, which minimizes radio transmission time. Considering that the radio of a wireless sensor node consumes the highest power among all modules, reduction of the transmission time saves substantial power. Second, a rectangular pulse train is used to excite a PZT patch instead of a sinusoidal wave. This eliminates a digital-to-analog converter and reduces the memory space. Third, ASN-2 senses the phase of the response signal instead of the magnitude. Sensing the phase of the signal eliminates an analog-to-digital converter and Fast Fourier Transform operation, which not only saves power, but also enables us to use a low-end low-power processor. Our SHM sensor node ASN-2 is implemented using a TI MSP430 microcontroller evaluation board. A cluster of ASN-2 nodes forms a wireless network. Each node wakes up at a predetermined interval, such as once in four hours, performs an SHM operation, reports the result to the central node wirelessly, and returns to sleep. The power consumption of our ASN-2 is 0.15 mW during the inactive mode and 18 mW during the active mode. Each SHM operation takes about 13 seconds to consume 236 mJ. When our ASN-2 operates once in every four hours, it is estimated to run for about 2.5 years with two AAA-size batteries ignoring the internal battery leakage.

• IEIE Transactions on Smart Processing and Computing
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• v.3 no.2
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• pp.96-102
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• 2014

The embedded processor market has grown rapidly and consistently with the appearance of mobile devices. In an embedded system, the power consumption and execution time are important factors affecting the performance. The system performance is determined by both hardware and software. Although the hardware architecture is high-end, the software runs slowly due to the low quality of codes. This study compared the performance of two major compilers, LLVM and GCC on a32-bit EISC embedded processor. The dynamic instructions and static code sizes were evaluated from these compilers with the EEMBC benchmarks.LLVM generally performed better in the ALU intensive benchmarks, whereas GCC produced a better register allocation and jump optimization. The dynamic instruction count and static code of GCCwere on average 8% and 7% lower than those of LLVM, respectively.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.1
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• pp.42-47
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• 2020

In OFDM-based very high-speed communication systems, FFT/IFFT processor should have several properties of low-area and low-power consumption as well as high throughput and low processing latency. Thus, radix-2k MDF (multipath delay feedback) architectures by adopting pipeline and parallel processing are suitable. In MDF architecture, the feedback memory which increases in proportion to the input signal word-length has a large area and power consumption. This paper presents a feedback memory size reduction method of radix-22 MDF IFFT processor for OFDM applications. The proposed method focuses on reducing the feedback memory size in the first two stages of MDF architectures since the first two stages occupy about 75% of the total feedback memory. In OFDM transmissions, IFFT input signals are composed of modulated data and pilot, null signals. In order to reduce the IFFT input word-length, the integer mapping which generates mapped data composed of two signed integer corresponding to modulated data and pilot/null signals is proposed. By simulation, it is shown that the proposed method has achieved a feedback memory reduction up to 39% compared to conventional approach.

• Information and Communications Magazine
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• v.25 no.12
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• pp.10-18
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• 2008

In this paper, we present a low-power design of H.264 codec based on dedicated hardware and software solution on EMP(ETRI Multi-core platform). The dedicated hardware scheme has reducing computation using motion estimation skip and reducing memory access for motion estimation. The design reduces data transfer load to 66% compared to conventional method. The gate count of H.264 encoder and the performance is about 455k and 43Mhz@30fps with D1(720x480) for H.264 encoder. The software solution is with ASIP(Application Specific Instruction Processor) that it is SIMD(Single Instruction Multiple Data), Dual Issue VLIW(Very Long Instruction Word) core, specified register file for SIMD, internal memory and data memory access for memory controller, 6 step pipeline, and 32 bits bus width. Performance and gate count is 400MHz@30fps with CIF(Common Intermediated format) and about 100k per core for H.264 decoder.

• Journal of Power Electronics
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• v.7 no.2
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• pp.132-139
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• 2007

Electrical motors are an integral part of industrial plants with no less than 5 billion motors built world wide every year. The demand for low-cost brushless DC (BLDC) motors has increased in industrial applications. This paper presents a BLDC motor control algorithm for low-cost motor drive applications using general purpose microcontrollers which have only one on-chip timer. This paper describes how to realize pulse width modulation (PWM) signals with general input/output (I/O) ports to control a three-phase permanent magnet brushless DC motor using the timer interrupt on MSP430F1232.

• Proceedings of the KIPE Conference
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• 2014.07a
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• pp.59-60
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• 2014

In this paper, development of laser diode driver with 2.5kW rating is presented. The driver is configured with interleaved PFC converter, high frequency full bridge DC-DC converter, two laser diode drivers and ${\mu}$-processor based controller. The system has two laser diode drivers for providing high current and low current. High current driver delivers normal output power of diode; low current driver is for providing critical current of diode for long lifetime. Computer simulation and experiment was performed for verification, as the results, developed driver performs well.

• Proceedings of the KIPE Conference
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• 2004.07a
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• pp.117-120
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• 2004

As the maximum power operating point (MPOP) of photovoltaic (PV) power generation systems changes with varying atmospheric conditions such as solar radiation and temperature, an important consideration in the design of efficient PV system is to track the MPOP correctly. Although the efficiency of these Maximum Power Point Tracking algorithms is usually high, it drops noticeably in case of rapidly changing atmospheric conditions. This paper describes common MPPT control algorithm: Constant Voltage Control, Perturbation and Observation(P&O), Incremental Conductance (IncCnd) and proposes a new MPPT algorithm based on P&O algorithm. The conception and control principles of the proposed MPPT method are explained in detail and its validity of the proposed method is verified through several simulated results. As it doesn't use digital signal processor, this MPPT method has the merits of both a cost efficiency and a simple control circuit design. Therefore, it is considered that the proposed MPPT method is proper to low power, low cost PV applications.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2021.05a
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• pp.600-602
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• 2021

With the development of the mobile industry and growing interest in artificial intelligence (AI) technology, a lot of research for AI processors which applicable to embedded systems is under study. When implementing AI to embedded systems, the design should be considered the restriction of resource and power consumption. Moreover, it is efficient to include a dedicated hardware accelerator in order to complement the low computational performance of the embedded system. In this paper, we propose an stand-alone embedded AI processor. The proposed AI processor includes a hardware accelerator that is dedicated to the distance-based AI algorithm and a general-purpose MCU that supports flexible programmability for application to various embedded systems. The AI processor was designed with Verilog HDL and verified by implementing on Field Programmable Gate Array (FPGA).

• 한국신재생에너지학회:학술대회논문집
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• 2005.06a
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• pp.160-163
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• 2005

This paper proposes a simple MPPT control scheme of a Current-Control-Loop Error system Based that can be obtains a lot of advantage to compare with another digital control method, P&O and IncCond algorithm, that is applied mostly a PV system. An existent method is needed an expensive processor such as DSP that calculated to change the measure power of a using current and voltage sensor at the once. Therefore, it is applied a small home power generation system that required many expenses. But, a proposed method is easy to solve the cost reduction and power unbalance problems that it is used by control scheme to limit error of a current control of common sensor. This proposed algorithm had verified through a simulation and an experiment on battery charger using PIC that is the microprocessor of a low price.