• 한국전기전자재료학회논문지
• /
• 제26권10호
• /
• pp.713-719
• /
• 2013

Power MOSFET operate voltage-driven devices, design to control the large power switching device for power supply, converter, motor control, etc. We have optimal designed planar and trench gate power MOSFET for high breakdown voltage and low on resistance. When we have designed $6,580{\mu}m{\times}5,680{\mu}m$ of chip size and 20 A current, on resistance of trench gate power MOSFET was low than planar gate power MOSFET. The on state voltage of trench gate power MOSFET was improved from 4.35 V to 3.7 V. At the same time, we have designed unified field limit ring for trench gate power MOFET. It is Junction Termination Edge type. As a result, we have obtained chip shrink effect and low on resistance because conventional field limit ring was convert to unify.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
• /
• pp.91-94
• /
• 2000

This paper introduces the design of low-power, fast-locking delay locked-loop using complementary pass transistor logic(CPL). Low-power design has become one of the most important in the modem VLSI application. CPL has the advantage of fast speed, high density, and low power with signal buffering between stages. Based on this analysis, we concluded that the I/O performance can be beyond 500㎒, 2-poly, 2-metal 0.65$\mu\textrm{m}$, 3.3V supply.

• 한국연소학회:학술대회논문집
• /
• 한국연소학회 2013년도 제46회 KOSCO SYMPOSIUM 초록집
• /
• pp.129-132
• /
• 2013

The low rank coal combustion and biomass-coal co-firing characteristics were reviewed on this study for the power plant construction. The importance of using low rank coal(LRC) for power plant is increasing gradually due to power generation economy and biomass co-firing is also concentrated as power source because it has carbon neutral characteristics to reduce green-house effect. The combustion characteristics of low rank coal and biomass for a 310MW coal firing power plant and a 100MW biomass and coal co-firing power plant were studied to apply into actual power plant design and optimized the furnace and burner design.

• 디지털산업정보학회논문지
• /
• 제4권3호
• /
• pp.77-83
• /
• 2008

In this paper, CPLD low power technology mapping for reuse module design under the time constraint is proposed. Traditional high-level synthesis do not allow reuse of complex, realistic datapath component during the task of scheduling. On the other hand, the proposed algorithm is able to approach a productivity of the design the low power to reuse which given a library of user-defined datapath component and to share of resource sharing on the switching activity in a shared resource. Also, we are obtainable the optimal the scheduling result in experimental results of our using chaining and multi-cycling in the scheduling techniques. Low power circuit make using CPLD technology mapping algorithm for selection reuse module by scheduling.

• 한국위성정보통신학회논문지
• /
• 제8권3호
• /
• pp.10-14
• /
• 2013

본 논문에서는 저전력 기술인 DVFS (Dynamic Voltage Frequency Scaling) 응용을 위하여, 동작주파수의 변화에도 소비전력이 일정한 특성을 갖는 전류모드 회로를 적용함에 있어서, 저속 동작에서 소비전력이 과다한 전류모드 회로의 문제점을 전류모드 회로에서 sub-threshold 영역 동작의 MOSFET을 적용함으로써 소비전력을 최소화하는 설계기술을 소개한다. 회로설계는 MOSFET BSIM 3모델을 사용하였으며, 시뮬레이션한 결과, strong-inversion 동작일 때 소비전력은 $900{\mu}W$이었으나, sub-threshold 영역으로 동작하였을 때, 소비전력이 $18.98{\mu}W$가 되어, 98 %의 소비전력의 절감효과가 있음을 확인하였다.

• Journal of Magnetics
• /
• 제19권3호
• /
• pp.273-281
• /
• 2014

This paper presents an innovative design for a low-speed, direct-drive, axial-flux permanent-magnet (AFPM) generator with a coreless stator and rotor that is intended for application to small wind turbine power generation systems. The performance of the generator is evaluated and optimized by means of comprehensive 3D electromagnetic finite element analysis. The main focus of this study is to improve the power output and efficiency of wind power generation by investigating the electromagnetic and structural features of a coreless AFPM generator. The design is validated by comparing the performance achieved with a prototype. The results of our comparison demonstrate that the proposed generator has a number of advantages such as a simpler structure, higher efficiency over a wide range of operating speeds, higher energy yield, lighter weight and better power utilization than conventional machines. It would be possible to manufacture low-cost, axial-flux permanent-magnet generators by further developing the proposed design.

• 전자공학회논문지C
• /
• 제34C권11호
• /
• pp.12-19
• /
• 1997

In this paper, we present a logic synthesis algorithm for low powr design fo combinational circuits. The proposed algorithm reduces power dissipation by eliminating unnecessary signal transitions. The proposed algorithm restructures a given circuit by using a kernel as prediction logic in a precomputation-based scheme such that switching activity of circuit can be minimized. Experimental results show that the system is efficient for low power design of combinational circuits.

• Journal of Power Electronics
• /
• 제7권4호
• /
• pp.318-327
• /
• 2007

The design and performance analysis of a power factor corrected (PFC), single-phase, single switch flyback buck-boost ac-dc converter is carried out for low power battery charging applications. The proposed configuration of the flyback buck-boost ac-dc converter consists of only one switch and operates in discontinuous current mode (DCM), resulting in simplicity in design and manufacturing and reduction in input current total harmonic distortion (THD). The design procedure of the flyback buck-boost ac-dc converter is presented for the battery charging application. To verify and investigate the design and performance, a simulation study of the flyback buck-boost converter in DCM is performed using the PSIM6.0 platform. A laboratory prototype of the proposed single switch flyback buck-boost ac-dc converter is developed and test results are presented to validate the design and developed model of the system.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2006년도 하계종합학술대회
• /
• pp.625-626
• /
• 2006

An Ultra low power super-regenerative oscillator was implemented with on-chip inductor and quench signal generator. The super-regenerative oscillator detects the signal level as low as -70dBm while consuming only 0.48mA at 1.5V supply voltage. These results indicate that the super-regenerative oscillator can be outstanding candidate the simple, ultra low power receiver design.

• 전기전자학회논문지
• /
• 제12권4호
• /
• pp.239-245
• /
• 2008

In this paper, a dc-dc power converter scheme with the FPGA based technology is proposed to apply for solar power system which has many features such as the good waveform, high efficiency, low switching losses, and low acoustic noises. The circuit configuration is designed by the conventional control type converter circuit using the isolated dc power supply. This new scheme can be more widely used for industrial power conversion system and many other purposes. Also, I proposed an efficient photovoltaic power interface circuit incorporated with a FPGA based DC-DC converter and a sine-pwm control method full-bridge inverter. The FPGA based DC-DC converter operates at high switching frequency to make the output current a sine wave, whereas the full-bridge inverter operates at low switching frequency which is determined by the ac frequency. As a result, we can get a 1.72% low THD in present state using linear control method. Moreover, we can use stepping control method, we can obtain the switching losses by Sp measured as 0.53W. This paper presents the design of a single-phase photovoltaic inverter model and the simulation of its performance.