• Proceedings of the KSR Conference
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• 1999.05a
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• pp.328-335
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• 1999

Three phase full bridge rectifier has been used to obtain dc voltage from three phase ac voltage source. The rectifier system has drawbacks that power factor is low and power flow is unidirectional. Therefore, when dc voltage increases due to regeneration of power the dynamic resister for dissipation of regeneration power must be installed. But three phase PWM converter can be controlled to operate with unity power factor and bidirectional power flow. Therefore when the PWM converter is used as do supply system, the dissipating resistor is not necessary. On this thesis, in order to design a controller having good performance, the hee phase PWM converter is completely modeled by using circuit DQ-transformation and thus a general and simple instructive equivalent circuit is obtained; the inductor set becomes a second order gyrator-coupled system and three phase inverter becomes a transformer as well. Under given phase angle(${\alpha}$) and modulation index(MI) of the three phase inverter, the dc and ac characteristics are obtained by analysis of the transformed equivalent circuit The validity of the equivalent circuit is confirmed through PSPICE simulation. And based on the dc and ac characteristics a controller with unity power factor is proposed.

• Journal of Korea Society of Digital Industry and Information Management
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• v.4 no.3
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• pp.77-83
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• 2008

In this paper, CPLD low power technology mapping for reuse module design under the time constraint is proposed. Traditional high-level synthesis do not allow reuse of complex, realistic datapath component during the task of scheduling. On the other hand, the proposed algorithm is able to approach a productivity of the design the low power to reuse which given a library of user-defined datapath component and to share of resource sharing on the switching activity in a shared resource. Also, we are obtainable the optimal the scheduling result in experimental results of our using chaining and multi-cycling in the scheduling techniques. Low power circuit make using CPLD technology mapping algorithm for selection reuse module by scheduling.

• Journal of Power Electronics
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• v.10 no.5
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• pp.461-467
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• 2010

This paper proposes a new soft-switched Sepic converter. It has low switching losses and low conduction losses due to its auxiliary communicated circuit and synchronous rectifier operation, respectively. Because of its positive and buck/boost-like DC voltage transfer function (M=D/(1-D)), the proposed converter is desirable for use in distributed power systems. The proposed converter has versions both with and without a transformer. The paper also suggests some design guidelines in terms of the power circuit and the control loop for the proposed converter.

• ETRI Journal
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• v.24 no.6
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• pp.473-476
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• 2002

This letter proposes an efficient kernel-based partitioning algorithm for reducing area and power dissipation in combinational circuit designs using don't-care sets. The proposed algorithm decreases power dissipation by partitioning a given circuit using a kernel extracted from the logic. The proposed algorithm also reduces the area overhead by minimizing duplicated gates in the partitioned sub-circuits. The partitioned subcircuits are further optimized utilizing observability don't-care sets. Experimental results for the MCNC benchmarks show that the proposed algorithm synthesizes circuits that on the average consume 22.5% less power and have 12.7% less area than circuits generated by previous algorithms based on a precomputation scheme.

• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.93-95
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• 2005

A new energy-recovery- sustain circuit suitable for a Plasma Display Panel(PDP) application is proposed. The proposed circuit features the low device voltage stresses, essential to design a power efficient and low cost PDP driver circuit. The proposed circuit is demonstrated experimentally for driving a 42 inches plasma display panel.

• Journal of Information Processing Systems
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• v.5 no.4
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• pp.187-196
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• 2009

This paper presents compact cryptographic hardware architecture suitable for the Mobile Trusted Module (MTM) that requires low-area and low-power characteristics. The built-in cryptographic engine in the MTM is one of the most important circuit blocks and contributes to the performance of the whole platform because it is used as the key primitive supporting digital signature, platform integrity and command authentication. Unlike personal computers, mobile platforms have very stringent limitations with respect to available power, physical circuit area, and cost. Therefore special architecture and design methods for a compact cryptographic hardware module are required. The proposed cryptographic hardware has a chip area of 38K gates for RSA and 12.4K gates for unified SHA-1 and SHA-256 respectively on a 0.25um CMOS process. The current consumption of the proposed cryptographic hardware consumes at most 3.96mA for RSA and 2.16mA for SHA computations under the 25MHz.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.29 no.9
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• pp.59-64
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• 2015

IEC is an international standards which are used in many countries with Europe as the center. IEC standard is introduced in Korea according to WTO/TBT agreements, however until now there are no buildings in Korea which are designed applying IEC standard. Therefore, KEA(Korea Electric Association) is scheduled to construct Korean low voltage electrical installation integration test site which is designed applying IEC standard. In this paper, before being under construction of Korean low voltage electrical installation integration test site, power substation is modeled based on real design parameters and method to select circuit breakers and cables is presented applying IEC standard in the modeled power substation. EMTP(ElctroMagnetic Transient Program) is used for simulation program. EMTP which is power system analysis program is easy to model power system and power substation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.11
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• pp.2014-2019
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• 2006

PDP driving circuit requires switching devices and capacitors to stand up high voltages over 160V. This is the main cause that the power consumption and the cost of a PDP driving circuit increase. Conventional PDP driving circuits consist of 3 voltage sources and 16 switching devices. In this paper, we propose a PDP driving circuit using 2 voltage sources and 12 switching devices that can be operated with a lower supply voltage than conventional driving circuit. The operation of the proposed driving circuit is verified by the computer simulation. Simulation results show that the output signal can drive PDP cell when the supply voltage is higher than 45V in the input frequency range 70kHz to 100kHz.

• Journal of Power Electronics
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• v.9 no.5
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• pp.772-780
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• 2009

A novel soft-switching two-switch flyback converter is proposed in this paper. This converter is composed of two active power switches, a flyback transformer, a blocking diode, and two passive regenerative clamping circuits. The proposed converter has the advantages of a low cost circuit configuration, a simple control scheme, a high efficiency, and a wide operating range. The circuit topology, analysis, design considerations, and experimental results of the new flyback converter are presented.

• Proceedings of the KIEE Conference
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• 2002.11d
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• pp.36-38
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• 2002

Low voltage circuit breakers which interrupt rapidly and raise the reliability of power supply are widly used in power distribution systems. In the paper, it was investigated how much Interrupting capability was improved by correcting the shape of the contact system in molded case circuit breaker(below MCCB), Prior to the interrupting testing, it was necessary for the optimum design to analyze magnetic forces on the contact system, generated by current and flux density. This paper presents both our compuational analysis and test results contact system in MCCB.