• Title/Summary/Keyword: Low voltage Operation

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Zero-voltage-switching three level auxiliary resonant commutated pole inverter (영전압 스위칭 3-레벨 보조 공진 폴 인버터)

  • 유동욱;원충연;조정구;백주원
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.45 no.4
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    • pp.535-542
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    • 1996
  • A zero voltage switching (ZVS) three level auxiliary resonant commutated pole inverter (ARCPI) is presented for high power GTO inverters. The concept of ARCP for two level inverter is extended to the three inverter. The proposed auxiliary commutation circuit consists of one resonant inductor and two bi-directional switches, which provides ZVS condition to the main devices without increasing device voltage or current stresses. The auxiliary device operates with zero current switching (ZCS) which enables use of the low cost thyristors. The proposed ARCPI can handle higher voltage and higher power (1-10MVA) comparing to the two level one. Operation and analysis of the ARCPI are illustrated and the features are compared o those of the snubber circuit incorporated three level inverter. Experimental results with 10kW, 4kHz prototype are presented to verify the principle of operation. (author). refs., figs., tab.

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Low Speed Operation of Simplified Sensorless Control of Synchronous Reluctance Motor (동기형 릴럭턴스 전동기의 단순구조형 센서리스 제어의 저속운전)

  • Ahn, Joon-Seon;Lee, Ju
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.55 no.2
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    • pp.61-68
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    • 2006
  • Many researchers have worked for the sensorless control of SynRM in recent years. However they commonly requires large calculations which induced from its complexity. For low cost application as like home appliance, it is difficult to utilize because of the cost problem. Therefore, it is necessary to introduce simplified sensorless control scheme that is composed of least calculation to estimate the rotor position. In this paper the sensorless control is performed using the characteristics of SynRM structure in which the linkage flux varies with rotor position, so the rotor position can be detected by the change of linkage flux. The estimation of linkage flux can be acquired from the integration of the motor terminal voltage which is commonly used method for the reliability of the estimation. However this estimation method has demerits in low speed operation therefore in that region the motor terminal voltage is compensated by the phase current. A digital simulation (MATLAB) and experiment were performed to confirm the adequacy of the proposed control scheme.

CoolSiCTM SiC MOSFET Technology, Device and Application

  • Ma, Kwokwai
    • Proceedings of the KIPE Conference
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    • 2017.07a
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    • pp.577-595
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    • 2017
  • ${\bullet}$ Silicon Carbide (SiC) had excellent material properties as the base material for next generation of power semiconductor. In developing SiC MOSFET, gate oxide reliability issues had to be first overcome before commercial application. Besides, a high and stable gate-source voltage threshold $V_{GS(th)}$ is also an important parameter for operation robustness. SiC MOSFET with such characteristics can directly use existing high-speed IGBT gate driver IC's. ${\bullet}$ The linear voltage drop characteristics of SiC MOSFET will bring lower conduction loss averaged over full AC cycle compared to similarly rate IGBT. Lower switching loss enable higher switching frequency. Using package with auxiliary source terminal for gate driving will further reduce switching losses. Dynamic characteristics can fully controlled by simple gate resistors. ${\bullet}$ The low switching losses characteristics of SiC MOSFET can substantially reduce power losses in high switching frequency operation. Significant power loss reduction is also possible even at low switching frequency and low switching speed. in T-type 3-level topology, SiC MOSFET solution enable three times higher switching freqeuncy at same efficiency.

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Improved LCCT Z-Source DC-AC Inverter for Ripple Reduction of Input Current and Capacitor Voltage (입력전류와 커패시터 전압의 맥동저감을 위한 개선된 LCCT Z-소스 DC-AC 인버터)

  • Shin, Yeon-Soo;Jung, Young-Gook;Lim, Young-Cheol
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.61 no.10
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    • pp.1432-1441
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    • 2012
  • In this study, an improved LCCT(Inductor-Capacitor-Capacitor-Trans) Z-source inverter(Improved LCCT ZSI) with characteristics of Quasi Z-source inverter(QZSI) and LCCT Z-source inverter(LCCT ZSI) is proposed. The proposed inverter can also reduce the voltage stress and input current/capacitor voltage ripples compared with conventional LCCT ZSI and Quasi ZSI. A two winding trans in Z-impedance network of the conventional LCCT ZSI is replaced by a three winding trans in the proposed inverter. To verify the validity of the proposed inverter, a DSP controlled hardware was made and PSIM simulation was executed for each method. Comparing the current and voltage ripples of each method under the condition of input DC voltage 70[V] and output AC voltage 76[Vrms], the input current and capacitor voltage ripple factors of the proposed inverter were low as 11[%] and 1.4[%] respectively. And, for generation of the same output AC voltage of each method, voltage stress of the proposed inverter was low as 175[V] under the condition of duty ratio D=0.15. As mentioned above, we could know that the proposed inverter have the characteristics of low voltage stress, low ripple factor and low operation duty ratio compared with the conventional methods. Finally, the efficiency according to load change/duty ratio and the transient state characteristics were discussed.

Three-Level SEPIC with Improved Efficiency and Balanced Capacitor Voltages

  • Choi, Woo-Young;Lee, Seung-Jae
    • Journal of Power Electronics
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    • v.16 no.2
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    • pp.447-454
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    • 2016
  • A single-ended primary-inductor converter (SEPIC) features low input current ripple and output voltage up/down capability. However, the switching devices in a two-level SEPIC suffer from high voltage stresses and switching losses. To cope with this drawback, this study proposes a three-level SEPIC that uses a low voltage-rated switch and thus achieves better switching performance compared with the two-level SEPIC. The three-level SEPIC can reduce switch voltage stresses and switching losses. The converter operation and control method are described in this work. The experimental results for a 500 W prototype converter are also discussed. Experimental results show that unlike the two-level SEPIC, the three-level SEPIC achieves improved power efficiency with balanced capacitor voltages.

Analysis and Design of a Current-fed Two Inductor Bi-directional DC/DC Converter using Resonance for a Wide Voltage Range

  • Noh, Yong-Su;Kim, Bum-Jun;Choi, Sung-Chon;Kim, Do-Yun;Won, Chung-Yuen
    • Journal of Electrical Engineering and Technology
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    • v.11 no.6
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    • pp.1634-1644
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    • 2016
  • In this paper, a current-fed two-inductor bi-directional DC/DC converter using resonance (CF-TIBCR) and its design method are proposed. The CF-TIBCR has characteristics of low current ripple and a high current rating because of two separated inductors. Also, it achieves zero voltage switching for all switches and zero current switching for switches of a low voltage stage by using the resonant tank. Besides, a voltage spike problem in conventional current-fed converters is solved without the need for an additional snubber or clamping circuits. As a result, the CF-TIBCR features high step-up and high efficiency. Since the proposed converter has difficulty achieving the soft-switching condition when the converter requires the low voltage transfer ratio, a method that varies the number of resonant cycles is adopted to extend the output voltage range with satisfying the soft-switching condition. The principles of the operation characteristics are presented with a theoretical analysis, and the proposed converter is verified through results of an experiment using a laboratory prototype.

Optimal PAM Control for a Buck Boost DC-DC Converter with a Wide-Speed-Range of Operation for a PMSM

  • Howlader, Abdul Motin;Urasaki, Naomitsu;Senjyu, Tomonobu;Yona, Atsushi;Saber, Ahmed Yousuf
    • Journal of Power Electronics
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    • v.10 no.5
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    • pp.477-484
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    • 2010
  • A pulse width modulation-voltage source inverter (PWM-VSI) is used for variable speed permanent magnet synchronous motor (PMSM) drives. The PWM-VSI fed PMSM has two major disadvantages. Firstly, the PWM-VSI DC-link voltage limits the magnitude of the PMSM terminal voltage. As a result, the motor speed is restricted. Secondly, in a low speed range, the PWM-VSI modulation index declines. This is caused by a high DC-link voltage and a low terminal voltage ratio. As a result, the distortion of the voltage command and the stator current are increased. This paper proposes an optimal pulse amplitude modulation (PAM) control which can adjust the inverter DC-link voltage by using a buck-boost DC-DC converter. At a low speed range, the proposed system can reduce the distortion of the voltage command, which improves the stator current waveform. Also, the allowable speed range is extended. In order to verify the proposed method, experimental results are provided to confirm the simulation results.

Stability Enhancement of a Hybrid Micro-grid System in Grid Fault Condition

  • Ambia, Mir Nahidul;Al-Durra, Ahmed;Caruana, Cedric;Muyeen, S.M.
    • Journal of international Conference on Electrical Machines and Systems
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    • v.2 no.2
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    • pp.225-231
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    • 2013
  • Low voltage ride through capability augmentation of a hybrid micro-grid system is presented in this paper which reflects enhanced reliability in the system. The control scheme involves parallel connected multiple ac-dc bidirectional converters. When the micro-grid system is subjected to a severe voltage dip by any transient fault single power converter may not be able to provide necessary reactive power to overcome the severe voltage dip. This paper discusses the control strategy of additional power converter connected in parallel with main converter to support extra reactive power to withstand the severe voltage dip. During transient fault, when the terminal voltage crosses 90% of its pre-fault value, additional converter comes into operation. With the help of additional power converter, the micro-grid system withstands the severe voltage fulfilling the grid code requirements. This multiple converter scheme provides the micro-grid system the capability of low voltage ride through which makes the system more reliable and stable.

Control and Design of a Arc Power Supply for KSTAR's the Neutral Beam Injection

  • Ryu, Dong-Kyun;Lee, Hee-Jun;Lee, Jung-Hyo;Won, Chung-Yuen
    • Journal of Electrical Engineering and Technology
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    • v.10 no.1
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    • pp.216-226
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    • 2015
  • The neutral beam injection generate ultra-high temperature energy in the tokamak of nuclear fusion. The neutral beam injection make up arc power supply, filament power supply and acceleration & deceleration power supply. The arc power supply has characteristics of low voltage and high current. Arc power supply generate arc through constant output of voltage and current. So this paper proposed suitable buck converter for low voltage and high current. The proposed buck converter used parallel switch because it can be increased capacity and decrease conduction loss. When an arc generated, the neutral beam injection chamber occur high voltage. And it will break output capacitor of buck converter. Therefore the output capacitor was removed in the proposed converter. Thus the proposed converter should be designed for the characteristics of low voltage and high current. Also, the arc power supply should be guaranteed for system stability. The proposed parallel buck converter enables the system stability of the divided low output voltage and high current. The proposed converter with constant output be the most important design of the output inductor. In this paper, designed arc power supply verified operation of system and stability through simulation and prototype. After it is applied to the 288[kW] arc power supply for neutral beam injection.

A current sense amplifier for low-voltage and high-speed SRAM (저전압 SRAM 의 고속동작을 위한 전류감지 증폭기)

  • Park, Hyun-Wook;Shim, Sang-Won;Chung, Yeon-Bae
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.727-730
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    • 2005
  • In this paper, we propose a new current sense amplifier for low-voltage, high-speed SRAM. As a supply voltage is reduced, a sensing delay is increased owing to reduced cell read current. It causes a low-speed operation in SRAM. To overcome this problem, we present a new current sense amplifier which consists of the current-mirror type circuit with feedback structure. For demonstration, a 0.8-V, 256-Kb SRAM incorporating the proposed current sense amplifier has been designed with $0.18-{\mu}m$ CMOS technology. The simulation results show 15.6ns of the sensing delay reduction in comparison with a previous current sense amplifier and 11.5ns of the sensing delay reduction in comparison with a voltage sense amplifier.

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