• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.222-222
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• 2010

Transparent semiconductor oxide thin films have been attracting considerable attention as potential channel layers in thin film transistors (TFTs) owing to their several advantageous electrical and optical characteristics such as high mobility, high stability, and transparency. TFTs with ZnO or similar metal oxide semiconductor thin films as the active layer have already been developed for use in active matrix organic light emitting diode (AMOLED). Of late, there have been several reports on TFTs fabricated with InZnO, AlZnSnO, InGaZnO, or other metal oxide semiconductor thin films as the active channel layer. These newly developed TFTs were expected to have better electrical characteristics than ZnO TFTs. In fact, results of these investigations have shown that TFTs with the new multi-component material have excellent electrical properties. In this work, we present TFTs with inverted coplanar geometry and with a novel HfInZnO active layer co-sputtered at room temperature. These TFTs are meant for use in low voltage, battery-operated mobile and flexible devices. Overall, the TFTs showed good performance: the low sub-threshold swing was low and the $I_{on/off}$ ratio was high.

• 한국컴퓨터정보학회논문지
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• 제15권1호
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• pp.1-12
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• 2010

지난 수십 년 동안 프로세서의 성능은 크게 발전하여 왔다. 하지만, 공정 기술의 발달에 기인한 프로세서의 급속한 성능 향상은 최근 들어 몇 가지 문제점들에 직면하고 있다. 반도체 공정 기술이 크게 발전하면서 회로 집적도가 급속도로 높아짐에 따라서 단위 면적당 소모되는 전력량의 증가와 그에 따른 열섬 현상이 대표적인 문제점으로 인식되고 있다. 이와 같은 최근 상황에서, 최신의 프로세서를 설계할 때에는 전력 효율성 향상과 온도 제어 기술이 반드시 함께 고려되어야만 한다. 본 논문에서는 프로세서에서 소비되는 전력의 상당 부분을 차지하고 있는 명령어 캐쉬의 전력 효율성을 향상시키기 위해 사용되는 대표적인 기법 중 하나인 필터 캐쉬 구조에서 발생하는 필터 캐쉬의 온도 상승 문제를 해결하기 위한 기법을 제안함으로써 저전력과 저온도 유지를 동시에 해결하고자 한다. 제안하는 변형 필터 캐쉬 구조는 세 가지로 분류된다. 프로세서가 명령어를 요청 시 필터 캐쉬와 메인 캐쉬를 선택적으로 접근하도록 하는 바이패스 필터 캐쉬 구조, 동일한 크기의 필터 캐쉬를 하나 더 추가하여 기존의 필터 캐쉬와 추가한 필터캐쉬를일정시간동안 번갈아 접근하도록하는 중복필터캐쉬구조, 그리고기존의필터캐쉬를두 개의독립된 필터 캐쉬로 분할하여 요청 명령어에 따라선택적으로 접근되도록 하는 분할필터 캐쉬 구조이다. 본논문에서는 제안된 변형 필터 캐쉬 기법들의 효율성을 정확하게 측정하기 위하여 Wattch 시뮬레이터와 Hotspot을 사용하여 모의실험을 수행한다. 모의실험결과, 본 논문에서 제안하는 세 가지 기법 중 분할 필터 캐쉬 구조가 저온도 필터 캐쉬유지에 가장 적합한 구조임을 확인할 수 있다.

• 대한전자공학회논문지SD
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• 제46권4호
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• pp.21-27
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• 2009

본 연구에서는 고온에서 Schottky barrier SOI nMOS 및 pMOS의 전류-전압 특성을 분석하기 위해서 Er 실리사이드를 갖는 SB-SOI nMOSFET와 Pt 실리사이드를 갖는 SB-SOI pMOSFET를 제작하였다. 게이트 전압에 따른 SB-SOI nMOS 및 pMOS의 주된 전류 전도 메카니즘을 온도에 따른 드레인 전류 측정 결과를 이용하여 설명하였다. 낮은 게이트 전압에서는 온도에 따라 열전자 방출 및 터널링 전류가 증가하므로 드레인 전류가 증가하고 높은 게이트 전압에서는 드리프트 전류가 감소하여 드레인 전류가 감소하였다. 고온에서 ON 전류가 증가하지만 드레인으로부터 채널영역으로의 터널링 전류 증가로 OFF 전류가 더 많이 증가하게 되므로 ON/OFF 전류비는 감소함을 알 수 있었다. 그리고 SOI 소자나 bulk MOSFET 소자에 비해 SB-SOI nMOS 및 pMOS의 온도에 따른 문턱전압 변화는 작았고 subthreshold swing은 증가하였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.543-543
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• 2013

Thin-film transistors (TFTs) based on oxide semiconductors have been regarded as promising alternatives for conventional amorphous and polycrystalline silicon TFTs. Oxide TFTs have several advantages, such as low temperature processing, transparency and high field-effect mobility. Lots of oxide semiconductors for example ZnO, SnO2, In2O3, InZnO, ZnSnO, and InGaZnO etc. have been researched. Particularly, zinc-tin oxide (ZTO) is suitable for channel layer of oxide TFTs having a high mobility that Sn in ZTO can improve the carrier transport by overlapping orbital. However, some issues related to the ZTO TFT electrical performance still remain to be resolved, such as obtaining good electrical contact between source/drain (S/D) electrodes and active channel layer. In this study, the bottom-gate type ZTO TFTs with staggered structure were prepared. Thin films of ZTO (40 nm thick) were deposited by DC magnetron sputtering and performed at room temperature in an Ar atmosphere with an oxygen partial pressure of 10%. After annealing the thin films of ZTO at $400^{\circ}C$ or an hour, Cu, Mo, ITO and Ti electrodes were used for the S/D electrodes. Cu, Mo, ITO and Ti (200 nm thick) were also deposited by DC magnetron sputtering at room temperature. The channel layer and S/D electrodes were defined using a lift-off process which resulted in a fixed width W of 100 ${\mu}m$ and channel length L varied from 10 to 50 ${\mu}m$. The TFT source/drain series resistance, the intrinsic mobility (${\mu}i$), and intrinsic threshold voltage (Vi) were extracted by transmission line method (TLM) using a series of TFTs with different channel lengths. And the performances of ZTO TFTs were measured by using HP 4145B semiconductor analyzer. The results showed that the Cu S/D electrodes had a high intrinsic field effect mobility and a low effective contact resistance compared to other electrodes such as Mo, ITO and Ti.

• International Journal of Industrial Entomology and Biomaterials
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• 제29권2호
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• pp.153-161
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• 2014

The aim of this study is to investigate the effects of ambient thermal environments on the development of swallowtail butterflies (Sericinus montela Gray). Developmental durations and survival rates of S. montela were examined at two crucial developmental stages, embryonic and larval development, at varying temperatures ranging from $15^{\circ}C$ to $35^{\circ}C$. As expected, our results indicated that increasing temperatures decreased the developmental duration and survival rate of the eggs. However, the larvae and pupae showed maximum survival rates at $20.0^{\circ}C$ and $25.0^{\circ}C$, and the represented durations were similar to those of the eggs. Larval development was stage-specific, revealing that the fourth and fifth instars at the later stages were more susceptible to temperature variation. When considering both parameters, the optimal development of S. montela occurred within the temperature range of $20.0-25.0^{\circ}C$. The lower threshold for the complete development of S. montela from eggs to eclosion of adults was calculated at $10.6^{\circ}C$ by linear regression analysis. The estimated value is similar to that of other endemic insects distributed in temperate climate zones, which indicates that S. montela belongs to a small group of swallowtails adjusted to low ambient temperatures. From the results, we predict that the full development of S. montela could be achieved within the temperature range of $17.5-30.0^{\circ}C$. Embryonic development ceased at both test temperature extremes, and no further larval development proceeded after the third instar at $35.0^{\circ}C$. These results suggest that embryogenesis can be significantly influenced by slight variations in the ambient thermal environment that fall below the optimal range.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.63-63
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• 2009

Many researchers have been studied as active and transparent electrode using ZnO (Zinc oxide) inorganic semiconductor material due to their good properties such as wide band-gap and high electrical properties compared with amorphous-Si. In this study, we fabricated ZnO films by the RF magnetron sputtering method at a low temperature for a channel layer in thin-film transistor (TFT) and investigated the characteristics of sputtered ZnO films. Also, the electrical properties of TFT using ZnO channel layer such as field effect mobility(${\mu}$), threshold voltage ($V_{th}$), and $I_{on/off}$ ratio are investigated for the application of the display and electronic devices.

• E2M - 전기 전자와 첨단 소재
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• 제9권2호
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• pp.174-179
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• 1996

We present a new physically based analytical equation for electron effective mobility in MOS inversion layers. The new semi-empirical model is accounting expicitly for surface roughness scattering and screened Coulomb scattering in addition to phonon scattering. This model shows excellent agreement with experimentally measured effective mobility data from three different published sources for a wide range of effective transverse field, channel doping and temperature. By accounting for screened Coulomb scattering due to doping impurities in the channel, our model describes very well the roll-off of effective mobility in the low field (threshold) region for a wide range of channel doping level (Na=3.0*10$^{14}$ - 2.8*10$^{18}$ cm$^{-3}$ ).

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.1297-1300
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• 2008

Electrical stress degradation of low temperature, amorphous silicon thin film transistors is reviewed, and the implications for various types of flexible circuitry including active matrix backplanes, integrated drivers and general purpose digital circuitry are examined. A circuit modeling tool that enables the prediction of complex circuit degradation is presented.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.239-242
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• 2008

We have investigated the reliability of short channel ($L=1.5{\mu}m$) p-type ELA poly-Si TFTs under hot carrier stress. Threshold voltage of short channel TFT was significantly more shifted to positive direction than that of long channel TFT under the same stress. This result may be attributed to electron trapping at the interface between poly-Si film and gate oxide layer.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.605-608
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• 2006

The recent application of wide band gap oxide semiconductors to transparent thin film transistors (TTFTs) is making a fast and growing (r)evolution on the contemporary solid-state electronics. In this paper we present some of the recent results we have obtained using wide band gap oxide semiconductors, like indium zinc oxide, produced by rf sputtering at room temperature. The devices work in the enhancement mode and exhibit excellent saturation drain currents. On-off ratios above $10^6$ are achieved. The optical transmittance data in the visible range reveals average transmittance higher than 80 %, including the glass substrate. Channel mobilities are also quite respectable, with some devices presenting values around $25\;cm^2/Vs$, even without any annealing or other post deposition improvement processes. The high performances presented by these TTFTs associated to a high electron mobility, at least two orders of magnitude higher than that of conventional amorphous silicon TFTs and a low threshold voltage, opens new doors for applications in flexible, wearable, disposable portable electronics as well as battery-powered applications.