• Title/Summary/Keyword: Low temperature threshold

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Effects of Temperature and Salinity on Egg Development of Ascidiella aspersa (Ascidiacea, Phlebobranchia, Ascidiidae) (거친대추멍게(Ascidiella aspersa: Ascidiacea, Phlebobranchia, Ascidiidae)의 알 발육에 미치는 수온과 염도의 영향)

  • Kim, Donghyun;Kim, Min Kyung;Park, Juun;Kim, Dong Gun;Yoon, Tae Joong;Shin, Sook
    • Korean Journal of Environmental Biology
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    • v.36 no.2
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    • pp.232-240
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    • 2018
  • This study was performed to investigate the effects of water temperature and salinity on the egg development and larval attachment of Ascidiella aspersa. The egg development and larval attachment were examined in 12 different water temperatures (6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26 and $28^{\circ}C$) and two salinity conditions(30 and 34 psu). The hatching and developmental rates of A. aspersa showed a tendency to increase with increasing water temperature regardless of salinity and to decrease after the optimal water temperature range. The optimal water temperatures for the hatching and development of egg of A. aspersa were in the range of $20-22^{\circ}C$. The low threshold water temperature was not different between 1.5 and $1.8^{\circ}C$ at 30 and 34 psu, respectively. The attachment rate showed the optimal water temperature range of $16-22^{\circ}C$ irrespective of the salinity and the attachment time increased continuously with increasing water temperature. Experimental results showed that optimum development and survival temperature of the egg and larvae of A. aspersa were in the range of $20-22^{\circ}C$ regardless of the salinity conditions. The results can be used to predict the distribution and occurrence of A. aspersa, and to prevent economic damages caused by its spread.

Fabrication and Characterization of Hybrid NTC Thermistor Films with Conducting Oxide Particles by an Aerosol-Deposition Process (상온 분사 공정에 의한 산화물전도 입자 복합 하이브리드 NTC 서미스터 필름의 제작 및 특성)

  • Kang, Ju-Eun;Ryu, Jungho;Choi, Jong-Jin;Yoon, Woon-Ha;Kim, Jong-Woo;Ahn, Cheol-Woo;Choi, Joon Hwan;Park, Dong-Soo;Kim, Yang-Do
    • Journal of the Korean Ceramic Society
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    • v.50 no.1
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    • pp.63-69
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    • 2013
  • Negative-temperature coefficient (NTC) thermistors based on nickel manganite spinel ($NiMn_2O_4$) are widely used for many applications, such as sensors and temperature compensators, due to their good thermistor characteristics and stabilities. However, to achieve thermistors with a high NTC B constant, which is an important figure of merit pertaining to the degree of temperature sensitivity, the activation energy should be high such that high resistivity at ambient temperatures results. To obtain a high B constant and low resistivity, Al and Si modified spinel structured $Ni_{0.6}Si_{0.2}Al_{0.6}Mn_{1.6}O_4$ hybrid thick films with the conducting metal oxide of $LaNiO_3$ were fabricated on a glass substrate by aerosol deposition at room temperature (RT). The NTC-$LaNiO_3$ hybrid thick films showed resistivity as low as < $100k{\Omega}\;cm$ at $90^{\circ}C$, which is one or two orders of magnitude lower than that of the monolithic NTC films, while retaining a high B constant of $NiMn_2O_4$ of over 5500 K when 20 wt% $LaNiO_3$ was added without a post-thermal treatment. These phenomena are explained by the percolation threshold mechanism.

High Speed Response Time of Nematic Liquid Crystal Mixtures for LCD Monitor and TV Applications

  • Kim, Y.B.;Hur, I.K.
    • Journal of Information Display
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    • v.2 no.3
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    • pp.32-38
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    • 2001
  • The most important parameter for TV application of LCD is a fast switching time for the display of moving image. To achieve faster switching time, the novel LC single materials with large dielectric anisotropies ($16{\sim}20$), high clearing temperatures ($195.5{\sim}237.4^{\circ}C$), broad nematic ranges (up to 169.9 $^{\circ}C$) and high birefringence ($0.254{\sim}0.2200$) were developed. KUR-series LC mixtures blended these single materials having significantly higher clearing temperatures and dielectric anisotropy values compared with conventional LC mixture. Especially, their clearing temperatures are $10{\sim}30^{\circ}C$ higher than their host mixture. These LC mixtures showing about lOms of high-speed switching time in Tv/Monitor of TFT LCD, is short enough to be addressed in a single time frame of 60Hz (16.7 ms). The threshold voltage $V_{th}$ was low enough to operate at a driving voltage of 5 V. The VHR values were found to be high enough for TFT-LCD in wide temperature range. Our novel LC mixtures are suitable materials for the inclusion in to LC mixtures for TV application of TN-LCD

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Characteristics of Si Nano-Crystal Memory

  • Kwangseok Han;Kim, Ilgweon;Hyungcheol Shin
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.1 no.1
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    • pp.40-49
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    • 2001
  • We have developed a repeatable process of forming uniform, small-size and high-density self-assembled Si nano-crystals. The Si nano-crystals were fabricated in a conventional LPCVD (low pressure chemical vapor deposition) reactor at $620^{\circ}c$ for 15 sec. The nano-crystals were spherical shaped with about 4.5 nm in diameter and density of $5{\times}l0^{11}/$\textrm{cm}^2$. More uniform dots were fabricated on nitride film than on oxide film. To take advantage of the above-mentioned characteristics of nitride film while keeping the high interface quality between the tunneling dielectrics and the Si substrate, nitride-oxide tunneling dielectrics is proposed in n-channel device. For the first time, the single electron effect at room temperature, which shows a saturation of threshold voltage in a range of gate voltages with a periodicity of ${\Delta}V_{GS}\;{\approx}\;1.7{\;}V$, corresponding to single and multiple electron storage is reported. The feasibility of p-channel nano-crystal memory with thin oxide in direct tunneling regime is demonstrated. The programming mechanisms of p-channel nano-crystal memory were investigated by charge separation technique. For small gate programming voltage, hole tunneling component from inversion layer is dominant. However, valence band electron tunneling component from the valence band in the nano-crystal becomes dominant for large gate voltage. Finally, the comparison of retention between programmed holes and electrons shows that holes have longer retention time.

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A Study on the Electrical Characteristics of Low Temperature Polycrystalline Thin Film Transistor(TFT) using Silicide Mediated Crystallization(SMC) (금속유도 결정화를 이용한 저온 다결정 실리콘 TFT 특성에 관한 연구)

  • 김강석;남영민;손송호;정영균;주상민;박원규;김동환
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2003.03a
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    • pp.129-129
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    • 2003
  • 최근에 능동 영역 액정 표시 소자(Active Matrix Liquid Crystal Display, AMLCD)에서 고해상도와 빠른 응답속도를 요구하게 되면서부터 다결정 실리콘(poly-Si) 박막 트랜지스터(Thin Film Transistor, TFT)가 쓰이게 되었다. 그리고 일반적으로 디스플레이의 기판을 상대적으로 저가의 유리를 사용하기 때문에 저온 공정이 필수적이다. 따라서 새로운 저온 결정화 방법과 부가적으로 최근 디스플레이 개발 동향 중 하나인 대화면에 적용 가능한 공정인 금속유도 결정화 (Silicide Mediated Crystallization, SMC)가 연구되고 있다. 이 소자는 top-gated coplanar구조로 설계되었다. (그림 1)(100) 실리콘 웨이퍼위에 3000$\AA$의 열산화막을 올리고, LPCVD로 55$0^{\circ}C$에서 비정질 실리콘(a-Si:H) 박막을 550$\AA$ 증착 시켰다. 그리고 시편은 SMC 방법으로 결정화 시켜 TEM(Transmission Electron Microscopy)으로 SMC 다결정 실리콘을 분석하였다. 그 위에 TFT의 게이트 산화막을 열산화막 만큼 우수한 TEOS(Tetraethoxysilane)소스로 사용하여 실리콘 산화막을 1000$\AA$ 형성하였고 게이트는 3000$\AA$ 두께로 몰리브덴을 스퍼터링을 통하여 형성하였다. 이 다결정 실리콘은 3$\times$10^15 cm^-2의 보론(B)을 도핑시켰다. 채널, 소스, 드래인을 정의하기 위해 플라즈마 식각이 이루어 졌으며, 실리콘 산화막과 실리콘 질화막으로 passivation하고, 알루미늄으로 전극을 형성하였다 그리고 마지막에 TFT의 출력특성과 전이특성을 측정함으로써 threshold voltage, the subthreshold slope 와 the field effect mobility를 계산하였다.

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Asymmetric Creep Behavior of Ceramics (세라믹의 비대칭 크리프 거동)

  • Lim, H.J.;Jung, J.W.;Han, D.B.;Kim, K.T.
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.20 no.10
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    • pp.3105-3112
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    • 1996
  • Asymmetric creep behaviors of ceramics under high temperature were investigated. Based on the Norton's power-low creep equation, multidirectional creep equations were proposed for general geometric loading conditions. The proposed equations were implemented into finite element program (ABAQUS) to simulate creep behaviors of ceramics in complicated loading conditions. The calculated results were compared with experimental data for uniaxial compression of Si-SiC C-ring and flexure of Si-SiC and $Al_2O_3$ in the literature. The finite element results agreed well with experimental data when the principal stresses are smaller than the threshold stress for creep damage. A good agreement was also obtained for damage zone in Si-SiC bending creep specimen compared with experimental data.

Characteristics of a-IGZO TFTs with Oxygen Ratio

  • Lee, Cho;Park, Ji-Yong;Mun, Je-Yong;Kim, Bo-Seok
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.341.1-341.1
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    • 2014
  • In the advanced material for the next generation display device, transparent amorphous oxide semiconductors (TAOS) are promising materials as a channel layer in thin film transistor (TFT). The TAOS have many advantages for large-area application compared with hydrogenated amorphous silicon TFT (a-Si:H) and organic semiconductor TFT. For the reasonable characteristics of TAOS, The a-IGZO has the excellent performances such as low temperature fabrication (R.T~), high mobility, visible region transparent, and reasonable on-off ratio. In this study, we investigated how the electric characteristics and physical properties are changed as various oxygen ratio when magnetron sputtering. we analysis a-IGZO film by AFM, EDS and I-V measurement. decreasing the oxygen ratio, the threshold voltage is shifted negatively and mobility is increasing. Through this correlation, we confirm the effect of oxygen ratio. We fabricated the bottom-gate a-IGZO TFTs. The gate insulator, SiO2 film was grown on heavily doped silicon wafer by thermal oxidation method. a-IGZO channel layer was deposited by RF magnetron sputtering. and the annealing condition is $350^{\circ}C$. Electrode were patterned Al deposition through a shadow mask(160/1000 um).

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Unified Dual-Gate Phase Change RAM (PCRAM) with Phase Change Memory and Capacitor-Less DRAM (Phase Change Memory와 Capacitor-Less DRAM을 사용한 Unified Dual-Gate Phase Change RAM)

  • Kim, Jooyeon
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.27 no.2
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    • pp.76-80
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    • 2014
  • Dual-gate PCRAM which unify capacitor-less DRAM and NVM using a PCM instead of a typical SONOS flash memory is proposed as 1 transistor. $VO_2$ changes its phase between insulator and metal states by temperature and field. The front-gate and back-gate control NVM and DRAM, respectively. The feasibility of URAM is investigated through simulation using c-interpreter and finite element analysis. Threshold voltage of NVM is 0.5 V that is based on measured results from previous fabricated 1TPCM with $VO_2$. Current sensing margin of DRAM is 3 ${\mu}A$. PCM does not interfere with DRAM in the memory characteristics unlike SONOS NVM. This novel unified dual-gate PCRAM reported in this work has 1 transistor, a low RESET/SET voltage, a fast write/erase time and a small cell so that it could be suitable for future production of URAM.

The electrical properties and phase transition characteristics of amorphous $Ge_2Sb_2Te_5$ thin film (비정질 $Ge_2Sb_2Te_5$ 박막의 상변화에 따른 전기적 특성 연구)

  • Yang, Sung-Jun;Lee, Jae-Min;Shin, Kyung;Chung, Hong-Bay
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.11a
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    • pp.210-213
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    • 2004
  • The phase transition between amorphous and crystalline states in chalcogenide semiconductor films can controlled by electric pulses or pulsed laser beam; hence some chalcogenide semiconductor films can be applied to electrically write/erase nonvolatile memory devices, where the low conductive amorphous state and the high conductive crystalline state are assigned to binary states. Memory switching in chalcogenides is mostly a thermal process, which involves phase transformation from amorphous to crystalline state. The nonvolatile memory cells are composed of a simple sandwich (metal/chalcogenide/metal). It was formed that the threshold voltage depends on thickness, electrode distance, annealing time and temperature, respectively.

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Fabrication and performance analysis of cost-effective fiber grating lasers for WDM-PON systems (WDM-PON 시스템용 저가형 Fiber Grating Laser의 제작 및 성능 분석)

  • Cho, Seung-Hyun;Lee, Woo-Ram;Lee, Jie-Hyun;Park, Jae-Dong;Kim, Byoung-Whi;Kang, Min-Ho;Shin, Dong-Wook
    • Korean Journal of Optics and Photonics
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    • v.16 no.1
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    • pp.13-20
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    • 2005
  • Fiber-Bragg-grating external cavity laser(FGL) modules were fabricated and experimentally analyzed. Proposed as a cost-effective solution for optical sources in the WDM-PON access network, FGL modules were packaged to TO-CAN type. We obtained a low threshold current of 13 mA, and an optical output power of 3.6 mW with a bias current of 60 mA at $25^{\circ}C$. The lasing wavelength dependencies on current and temperature were as small as 5.2 pm/mA and 30 pm/$^{\circ}C$, respectively. These change rates of the wavelength with the temperature and current are smaller than those of the DFB laser. Single-mode oscillations with the side-mode suppression ratio(SMSR) over 30 dB are maintained above the threshold current level. The FGL modules can be directly modulated at 155 Mbps, PRBS(2$^{23}$ -1) NRZ signal. Through the BER plots, we did not see the significant degradations before and after the transmission over 20km of the SMF at 155 Mb/s.