• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.289.2-289.2
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• 2016

In-Ga-Zn-O(IGZO) receive great attention as a channel material for thin film transistors(TFTs) as next-generation display panel backplanes due to its superior electrical and physical properties such as a high mobility, low off-current, high sub-threshold slope, flexibility, and optical transparency. For the purpose of fabricating high performance IGZO TFTs, a thermal recovery process above a temperature of $300^{\circ}C$ is required for recovery or rearrangement of the ionic bonding structure. However diffused metal atoms from source/drain(S/D) electrodes increase the channel conductivity through the oxidation of diffused atoms and reduction of $In_2O_3$ during the thermal recovery process. Threshold voltage ($V_{TH}$) shift, one of the electrical instability, restricts actual applications of IGZO TFTs. Therefore, additional investigation of the electrical stability of IGZO TFTs is required. In this paper, we demonstrate the effect of Ti diffusion and modulation of interface traps by carrying out an annealing process on IGZO. In order to investigate the effect of diffused Ti atoms from the S/D electrode, we use secondary ion mass spectroscopy (SIMS), X-ray photoelectron spectroscopy, HSC chemistry simulation, and electrical measurements. By thermal annealing process, we demonstrate VTH shift as a function of the channel length and the gate stress. Furthermore, we enhance the electrical stability of the IGZO TFTs through a second thermal annealing process performed at temperature $50^{\circ}C$ lower than the first annealing step to diffuse Ti atoms in the lateral direction with minimal effects on the channel conductivity.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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• pp.214.2-214.2
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• 2013

Device performance for the 45 and 32 nm node CMOS technology requires the integration of ultralow-k materials. To lower the dielectric constant for PECVD and spin-on materials, partial replacement of the solid network with air (k=1.01) appears to be more intuitive and direct option. This can be achieved introducting of second "labile" phase during depositoin that is removed during a subsequent UV curing and annealing step. Besides, with shrinking line dimensions the resistivity of barrier films cannot meet the International Technology Roadmap for Semiconductors (ITRS) requirements. To solve this issue self-forming diffusion barriers have drawn attention for great potential technique in meeting all ITRS requirments. In this present work, we report a Cu-V alloy as a materials for the self-forming barrier process. And we investigated diffusion barrier properties of self-formed layer on low-k dielectrics with or without UV curing treatment. Cu alloy films were directly deposited onto low-k dielectrics by co-sputtering, followed by annealing at various temperatures. X-ray diffraction revealed Cu (111), Cu (200) and Cu (220) peaks for both of Cu alloys. The self-formed layers were investigated by transmission electron microscopy. In order to compare barrier properties between V-based interlayer on low-k dielectric with UV curing and interlayer on low-k dielectric without UV curing, thermal stability was measured with various heat treatment temperature. X-ray photoelectron spectroscopy analysis showed that chemical compositions of self-formed layer. The compositions of the V based self-formed barriers after annealing were strongly dominated by the O concentration in the dielectric layers.

• 한국진공학회지
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• 제10권2호
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• pp.219-224
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• 2001

N형 InGaAs에 대한 Pd/Ge/Ti/Pt 오믹 접촉 특성을 조사하였다. $450^{\circ}C$까지의 급속 열처리에 의해 우수한 오믹 특성을 나타내어 $400^{\circ}C$, 10초의 급속 열처리 조건에서 최저 $3.7\times10^{-6}\; \Omega\textrm{cm}^2$ 의 접촉 비저항을 나타내었다. 이는 열처리에 의해 생성된 Pd-Ge계 화합물의 형성 및 Ge의 InGaAs 표면으로의 확산과 관련이 있었다. 그러나 열처리 시간을 연장할 경우 접촉 비저항이 $low-10^5\; \Omega\textrm{cm}^2$로 약간 증가하였다. 고온 열처리 후에도 오믹 재료와 InGaAs의 평활한 계면을 유지하면서 우수한 오믹 특성을 나타내어, 화합물 반도체 소자의 오믹 접촉으로 충분히 응용 가능하다고 판단된다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권2호
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• pp.163-168
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• 2014

Bottom gate thin-film transistors were fabricated using solution processed IGZO channel layers with various gallium composition ratios that were annealed on a hot plate. Increasing the gallium ratio from 0.1 to 0.6 induced a threshold voltage shift in the electrical characteristics, whereas the molar ratio of In:Zn was fixed to 1:1. Among the devices, the IGZO-TFTs with gallium ratios of 0.4 and 0.5 exhibited suitable switching characteristics with low off-current and low SS values. The IGZO-TFTs prepared from IGZO films with a gallium ratio of 0.4 showed a mobility, on/off current ratio, threshold voltage, and subthreshold swing value of $0.1135cm^2/V{\cdot}s$, ${\sim}10^6$, 0.8 V, and 0.69 V/dec, respectively. IGZO-TFTs annealed at $300^{\circ}C$, $350^{\circ}C$, and $400^{\circ}C$ were also fabricated. Annealing at lower temperatures induced a positive shift in the threshold voltage and produced inferior electrical properties.

• 한국표면공학회지
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• 제45권3호
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• pp.117-122
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• 2012

ZTO/GZO double layered films were prepared on unheated non-alkali glass substrates. ZTO films were deposited by RF/DC hybrid magnetron co-sputtering using ZnO (RF) target and $SnO_2$ (DC) targets, and then GZO films were deposited by DC magnetron sputtering using an GZO ($Ga_2O_3$:5.57 wt%) target. These films were post-annealed at temperature of 200, $300^{\circ}C$ in air and vacuum ambient for 30 min. In the case of post-annealing in air, ZTO/GZO double layer showed relatively low resistivity change, compared to GZO single layer. Furthermore, ZTO/GZO double layer revealed low WVTR, compared to GZO single layer. Therefore, it can be confirmed that ZTO film doing a role with barrier for water or oxygen diffusion.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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• pp.280-281
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• 2006

We studied the nematic liquid crystal (NLC) aligning capabilities using the new alignment material of a Titanium dioxide ($TiO_2$) thin film by rf magnetron sputtering system for 15min under various rf power. A very low pretilt angle by ion beam exposure on the $TiO_2$ thin film was measured. A good LC alignment by the ion beam alignment method on the $TiO_2$ thin film surface was observed at annealing temperature of $200^{\circ}C$, and the alignment defect of the NLC was observed above annealing temperature of $250^{\circ}C$. Consequently, the low NLC pretilt angle and the good thermal stability of LC alignment by the ion beam alignment method on the $TiO_2$ thin film by sputter method as various rf power condition can be achieved.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 추계학술대회 논문집
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• pp.120-121
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• 2007

Nano-floating gate memory (NFGM) devices were fabricated by using the low temperature poly-Si thin films crystallized by ELA and the $In_2O_3$ nano-particles embedded in polyimide layers as charge storage. Memory effect due to the charging effects of $In_2O_3$ nano-particles in polyimide layer was observed from the TFT NFGM. The post-annealing in 3% diluted hydrogen $(H_2/N_2)$ ambient improved the retention characteristics of $In_2O_3$ nano-particles embedded poly-Si TFT NFGM by reducing the interfacial states as well as grain boundary trapping states.

• 한국재료학회지
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• 제24권5호
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• pp.229-235
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• 2014

In this paper, the effects of precipitates and Mn-solute atoms on the recrystallization behavior of an Al-Mn alloy was studied using micro-Vickers hardness, electrical conductivity measurements and optical microscopy. Various thermo-mechanical processes were designed to investigate the different morphologies, and the solute concentration, of Mn in the matrix. The results indicate that the recrystallization temperature, $T_R$ and time, $t_R$, are influenced by the amount of M-solute atoms in the matrix, and that the recrystallization microstructure is influenced by the amount of precipitates. Recrystallization in the Slow-Cooling specimen was rapid due to its low concentration of Mn-solute atoms, and the crystal-grain size was the smallest due to finely distributed precipitates. However, in the case of the No-Holding specimen, elongated grains were observed at the low annealing temperature and the largest recrystallized grains were observed at the high annealing temperatures (compared with Slow-Cooling and Base specimens) due to the high Mn-solute atoms in the matrix.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 추계학술대회 논문집 Vol.14 No.1
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• pp.558-561
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• 2001

Vanadium oxide ($VO_x$) thin films are very good candidate material for uncooled infrared (IR) detectors due to their high temperature coefficient of resistance (TCR) at room temperature. But, the deposition of $VO_x$ thin films showing good electrical properties is very difficult in micro bolometer fabrication process using sacrificial layer removal because of its low process temperature and thickness of thin films less than $1000{\AA}$. This paper presents a new fabrication process of $VO_x$ thin films having high TCR and low resistance. Through sandwich structure of $VO_{x}(100{\AA})/V(80{\AA})/VO_{x}(500{\AA})$ by sputter method and post-annealing at oxygen ambient, we have achieved high TCR more than $-2%/^{\circ}C$ and low resistance less than $10K\Omega$ at room temperature.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 추계학술대회 논문집
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• pp.558-561
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• 2001

Vanadium oxide ($VO_{x}$) thin films are very good candidate material for uncooked infrared (IR) detectors due to their high temperature coefficient of resistance (TCR) at room temperature. But, the deposition of $VO_{x}$ thin films showing good electrical properties is very difficult in micro bolometer fabrication process using sacrificial layer removal because of its low process temperature and thickness of thin films less than 1000${\AA}$. This paper presents a new fabrication process of $VO_{x}$ thin films having high TCR and low resistance. Through sandwich structure of $VO_{x}$(100${\AA}$)/V(80${\AA}$)/$VO_{x}$(500${\AA}$) by sputter method and post-annealing at oxygen ambient, we have achieved high TCR more than -2%/$^{\circ}C$ and low resistance less than $10K\Omega$ at room temperature.