• Title/Summary/Keyword: Low temperature GaN

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Low temperature growth of Ga2O3 thin films on Si substrates by MOCVD and their electrical characteristics (MOCVD에 의한 Si 기판 위의 Ga2O3 박막 저온 결정 성장과 전기적 특성)

  • Lee, Jung Bok;Ahn, Nam Jun;Ahn, Hyung Soo;Kim, Kyung Hwa;Yang, Min
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.32 no.2
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    • pp.45-50
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    • 2022
  • Ga2O3 thin films were grown on n-type Si substrates at various growth temperatures of 500, 550, 600, 650 and 700℃. The Ga2O3 thin films grown at 500℃ and 550℃ were characterized as featureless flat surface. Grown at higher temperatures (600, 650, and 700℃) showed very rough surface morphology. To figure out the annealing effect on the thin films grown at relatively low temperatures (500, 550, 600, 650 and 700℃), the Ga2O3 films were thermally treated at 900℃ for 10 minutes. Crystal structure of the Ga2O3 films grown at 500 and 550℃ were changed from amorphous to polycrystalline structure with flat surface. Ga2O3 film grown at 550℃ was chosen for the fabrication of a Schottky barrier diode (SBD). Electrical properties of the SBDs depend on the thermal treatment were evaluated. A MSM type photodetector was made on the low temperature grown Ga2O3 thin film. The photocurrent for the illumination of 266 nm wavelength showed 5.32 times higher than dark current at the operating voltage of 10 V.

On the Crystal Growth of Gap by Synthesis Solute Diffusion Method and Electroluminescence Properties. (합성용질확산법에 의한 GaP결정의 성장과 전기루미네센스 특성)

  • Kim, Seon-Tae;Mun, Dong-Chan
    • Korean Journal of Materials Research
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    • v.3 no.2
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    • pp.121-130
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    • 1993
  • The GaP crystals were grown by synthesis solute diffusion method and its properties were investigated. High quality single crystals were obtained by pull-down the crystal growing ampoule with velocity of 1.75mm/day. Etch pits density along vertical direction of ingot was increased from 3.8 ${\times}{10^4}$c$m^{-2}$ of the first freeze to 2.3 ${\times}{10^5}$c$m^2$ of the last freeze part. The carrier concentration and mobilities at room temperature were measured to 197.49cc$m^2$/V.sec and 6.75 ${\times}{10^{15}}$c$m^{-3]$, respectively. The temperature dependence of optical energy gap was empirically fitted to $E_g$(T)=[2.3383-(6.082${\times}{10^{-4}}$)$T^2$/(373. 096+TJeV. Photoluminescence spectra measured at low temperature were consist with sharp line-spectra near band-gap energy due to bound-exciton and phonon participation in band edge recombination process. Zn-diffusion depth in GaP was increased with square root of diffusion time and temperature dependence of diffusion coefficient was D(Tl = 3.2 ${\times}{10^3}$exp( - 3.486/$k_{\theta}$T)c$m^2$/sec. Electroluminescence spectra of p-n GaP homojunction diode are consisted with emission at 630nm due to recombination of donor in Zn-O complex center with shallow acceptors and near band edge emission at 550nm. Photon emission at current injection level of lower than 100m A was due to the band-filling mechanism.

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Improved Light Output of GaN-Based Light-Emitting Diodes with ZnO Nanorod Arrays (ZnO 나노로드 배열에 의한 GaN기반 광다이오드의 광추출율 향상)

  • Lee, Sam-Dong;Kim, Kyoung-Kook;Park, Jae-Chul;Kim, Sang-Woo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.59-60
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    • 2008
  • GaN-based light-emitting diodes (LEDs) with ZnO nanorod arrays on a planar indium tin oxide (ITO) transparent electrode were demonstrated. ZnO nanorods were grown into aqueous solution at low temperature of $90^{\circ}C$. Under 20 mA current injection, the light output efficiency of the LED with ZnO nanorod arrays on ITO was remarkably increased by about 40 % of magnitude compared to the conventional LED with only planar ITO. The enhancement of light output by the ZnO nanorod arrays is due to the formation of side walls and a rough surface resulting in multiple photon scattering at the LED surface.

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Characteristics of Cl-doped ZnSe epilayers grown by hot wall epitaxy (HWE 방법으로 성장한 ZnSe:Cl 박막의 특성)

  • 이경준;전경남;강한솔;정원기;두하영;이춘호
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.7 no.2
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    • pp.271-275
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    • 1997
  • We have successfully grown Cl-doped ZnSe epitaxial layers on GaAs(100) sub-strates by HWE using $ZnCl_2$ as a doping source. The Cl-doped ZnSe layers showed mirrorlike morphology and good crystallinity. It has been found that the layer exhibited an n-type conduction with low resistivity. The carrier concentration is, obtained about $10^{16}\textrm {cm}^{-3}$, where a resistivity reached 10 $\Omega \textrm {cm}$. The layer with an appropriate doping level exhibited blue photoluminescence at room temperature. The strong blue PL was obtained at the hall mobility of $100^2\textrm {cm}$/Vㆍsec.

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Fabrication of branched Ga2O3 nanowires by post annealing with Au seeds

  • Lee, Mi-Seon;Seo, Chang-Su;Gang, Hyeon-Cheol
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.203-203
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    • 2015
  • Gallium Oxide (Ga2O3) has been widely investigated for the optoelectronic applications due to its wide bandgap and the optical transparency. Recently, with the development of fabrication techniques in nanometer scale semiconductor materials, there have been an increasing number of extensive reports on the synthesis and characterization of Ga2O3 nano-structures such as nano-wires, nano-belts, and nano-dots. In contrast to typical vapor-liquid-solid growth mode with metal catalysts to synthesis 1-dimensional nano-wires, there are several difficulties in fabricating the nano-structures by using sputtering techniques. This is attributed to the fact that relatively low growth temperatures and higher growth rate compared with chemical vapor deposition method. In this study, Ga2O3 nanowires (NWs) were synthesized by using radio-frequency magnetron sputtering method. The NWs were then coated by Au thin films and annealed under Ar or N2 gas enviroment with no supply of Gallium and Oxygen source. Several samples were prepared with varying the post annealing parameters such as gas environment annealing time, annealing temperature. Samples were characterized by using XRD, SEM, and PL measurements. In this presentation, the details of fabrication process and physical properties of branched Ga2O3 NWs will be reported.

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Enhancement of light extraction efficiency in vertical light-emitting diodes with MgO nano-pyramids structure

  • Son, Jun-Ho;Yu, Hak-Ki;Lee, Jong-Lam
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.03a
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    • pp.16-16
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    • 2010
  • GaN-based light-emitting diodes (LEDs) are attracting great interest as candidates for next-generation solid-state lighting, because of their long lifetime, small size, high efficacy, and low energy consumption. However, for general illumination applications, the external quantum efficiency of LEDs, determined by the internal quantum efficiency (IQE) and the light extraction efficiency, must be further increased. The IQE is determined by crystal quality and epitaxial layer structure and high value of IQE more than 70% for blue LEDs have been already reported. However, there is much room for improvement of light extraction efficiency because most of the generated photons from active layer remain inside LEDs by total internal reflection at the interface of semiconductor with air due to the high refractive index difference between LEDs epilayer (for GaN, n=2.5) and air (n=1). The light confining in LEDs will be reabsorbed by the metal electrode or active layer, reducing the efficacy of LEDs. Here, we present the first demonstration of enhanced light extraction by forming a MgO nano-pyramids structure on the surface of vertical-LEDs. The MgO nano-pyramids structure was successfully fabricated at room temperature using conventional electron-beam evaporation without any additional process. The nano-sized pyramids of MgO are formed on the surface during growth due to anisotropic characteristics between (111) and (200) plane of MgO. The ZnO layer with quarter-wavelength in thickness is inserted between GaN and MgO layers to increase the critical angle for total internal reflection, because the refractive index of ZnO (n=1.94) could be matched between GaN (n=2.5) and MgO (n=1.73). The MgO nano-pyramids structure and ZnO refractive-index modulation layer enhanced the light extraction efficiency ofV-LEDs with by 49%, comparing with the V-LEDs with a flat n-GaN surface. The angular-dependent emission intensity shows the enhanced light extraction through the side walls of V-LEDs as well as through the top surface of the n-GaN, because of the increase in critical angle for total internal reflection as well as light scattering at the MgO nano-pyramids surface.

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Fabrication and Characteristics of ZnO TFTs for Flexible Display using Low Temp Process (Flexible Display용 Low Temp Process를 이용한 ZnO TFT의 제작 및 특성 평가)

  • Kim, Young-Su;Kang, Min-Ho;Nam, Dong-Ho;Choi, Kang-Il;Oh, Jae-Sub;Song, Myung-Ho;Lee, Hi-Deok;Lee, Ga-Won
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.44-44
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    • 2009
  • Recently, transparent ZnO-based TFTs have attracted much attention for flexible displays because they can be fabricated on plastic substrates at low temperature. We report the fabrication and characteristics of ZnO channel layers(ZnO TFTs) having different channel thicknesses. The ZnO film were deposited as active channel layers on $Si_3N_4/Ti/SiO_2p$-Si substrates by rf magnetron sputtering at $100\;^{\circ}C$ without additional annealing. Also the Zno thin films deposited at oxygen partial pressures of 40%. ZnO TFTs using a bottom-gate configuration were investigated. The $Si_3N_4$ film were deposited as gate insulator by PE-CVD at $15\;^{\circ}C$. All Processes were processed below $150^{\circ}C$ which is optimal temperature for flexible display and were used dry etching method.

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저온 공정 온도에서 $Al_2O_3$ 게이트 절연물질을 사용한 InGaZnO thin film transistors

  • 우창호;안철현;김영이;조형균
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.11-11
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    • 2010
  • Thin-film-transistors (TFTs) that can be deposited at low temperature have recently attracted lots of applications such as sensors, solar cell and displays, because of the great flexible electronics and transparent. Transparent and flexible transistors are being required that high mobility and large-area uniformity at low temperature [1]. But, unfortunately most of TFT structures are used to be $SiO_2$ as gate dielectric layer. The $SiO_2$ has disadvantaged that it is required to high driving voltage to achieve the same operating efficiency compared with other high-k materials and its thickness is thicker than high-k materials [2]. To solve this problem, we find lots of high-k materials as $HfO_2$, $ZrO_2$, $SiN_x$, $TiO_2$, $Al_2O_3$. Among the High-k materials, $Al_2O_3$ is one of the outstanding materials due to its properties are high dielectric constant ( ~9 ), relatively low leakage current, wide bandgap ( 8.7 eV ) and good device stability. For the realization of flexible displays, all processes should be performed at very low temperatures, but low temperature $Al_2O_3$ grown by sputtering showed deteriorated electrical performance. Further decrease in growth temperature induces a high density of charge traps in the gate oxide/channel. This study investigated the effect of growth temperatures of ALD grown $Al_2O_3$ layers on the TFT device performance. The ALD deposition showed high conformal and defect-free dielectric layers at low temperature compared with other deposition equipments [2]. After ITO was wet-chemically etched with HCl : $HNO_3$ = 3:1, $Al_2O_3$ layer was deposited by ALD at various growth temperatures or lift-off process. Amorphous InGaZnO channel layers were deposited by rf magnetron sputtering at a working pressure of 3 mTorr and $O_2$/Ar (1/29 sccm). The electrodes were formed with electron-beam evaporated Ti (30 nm) and Au (70 nm) bilayer. The TFT devices were heat-treated in a furnace at $300^{\circ}C$ and nitrogen atmosphere for 1 hour by rapid thermal treatment. The electrical properties of the oxide TFTs were measured using semiconductor parameter analyzer (4145B), and LCR meter.

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Performance enhancement of Amorphous In-Ga-Zn-O junctionless TFT at Low temperature using Microwave Irradiation

  • Kim, Tae-Wan;Choe, Dong-Yeong;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.210.1-210.1
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    • 2015
  • 최근 산화물 반도체에 대한 연구가 활발하게 이루어지고 있다. 비정질 산화물 반도체인 In-Ga-Zn-O (IGZO)는 기존의 비정질 실리콘에 비해 공정 단가가 낮으며 넓은 밴드 갭으로 인한 투명성을 가지고 있고, 저온 공정이 가능하여 다양한 기판에 적용이 가능하다. 반도체의 공정 과정에서 열처리는 소자의 특성 개선을 위해 필요하다. 일반적인 열처리 방법으로 furnace 열처리 방식이 주로 이용된다. 그러나 furnace 열처리는 시간이 오래 걸리며 일반적으로 고온에서 이루어지기 때문에 최근 연구되고 있는 유리나 플라스틱, 종이 기판을 이용한 소자의 경우 기판이 손상을 받는 단점이 있다. 이러한 단점들을 극복하기 위하여 저온 공정인 마이크로웨이브를 이용한 열처리 방식이 제안되었다. 마이크로웨이브 열처리 기술은 소자에 에너지를 직접적으로 전달하기 때문에 기존의 다른 열처리 방식들과 비교하여 에너지 전달 효율이 높다. 또한 짧은 공정 시간으로 공정 단가를 절감하고 대량생산이 가능한 장점을 가지고 있으며, 저온의 열처리로 기판의 손상이 없기 때문에 기판의 종류에 국한되지 않은 공정이 가능할 수 있을 것으로 기대된다. 따라서 본 연구에서는 마이크로웨이브 열처리가 소자의 전기적 특성 개선에 미치는 영향을 확인하였다. 제작된 IGZO 박막트렌지스터는 p-type bulk silicon 위에 thermal SiO2 산화막이 100 nm 형성된 기판을 사용하였다. RCA 클리닝을 진행한 후 RF sputter를 사용하여 In-Ga-Zn-O (1:1:1)을 70 nm 증착하였다. 이후에 Photo-lithography 공정을 통하여 active 영역을 형성하였고, 전기적 특성 평가가 용이한 junctionless 트랜지스터 구조로 제작하였다. 후속 열처리 방식으로 마이크로웨이브 열처리를 1000 W에서 2분간 실시하였다. 그리고 기존 열처리 방식과의 비교를 위해 furnace를 이용하여 N2 가스 분위기에서 $600^{\circ}C$의 온도로 30분 동안 열처리를 실시하였다. 그 결과, 마이크로웨이브 열처리를 한 소자의 경우 기존의 furnace 열처리 소자와 비교하여 우수한 전기적 특성을 나타내는 것을 확인하였다. 따라서, 마이크로웨이브를 이용한 열처리 공정은 향후 저온 공정을 요구하는 소자 공정에 활용될 수 있을 것으로 기대된다.

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Analysis of the Junction Temperature in the LED Chips using the Finite Element Method (유한요소법을 이용한 LED 칩의 접합부 온도 해석)

  • Han, Ji-Won;Park, Joo-Hun
    • Journal of the Korean Society of Safety
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    • v.27 no.6
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    • pp.26-30
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    • 2012
  • It is difficult to determine the junction temperature because LED lightings are manufactured using several chips with low power. This paper reports on the finite element method of the determination of junction temperature in the GaN-based LEDs. The calculated junction temperature of the LED chip using FEM was compared with the experimentally measured data. As the results of this study, the junction temperature of LED chips with via holes is lower than that of LED chips without via hole. Therefore, the research of via hole is necessary to decrease junction temperature of LED chips.