• Proceedings of the KIEE Conference
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• 2006.10c
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• pp.485-487
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• 2006

This paper describes a frequency synthesizer designed in a $0.25{\mu}m$ CMOS technology for using local oscillators for the IF stages. The design is focused mainly on low-power characteristics. A simple ring-oscillator based VCO is used, where a single control signal can be used for variable resistors. The designed PLL includes all building blocks for elimination of external components, other than the crystal, and its operating frequency can be programmed by external data. It operates in the frequency range of 250MHz to 800MHz and consumes l.08mA at 500MHz from a 2.5V supply. The measured phase noise is -85dBc/Hz in-band and -105dBc/Hz at 1MHz offset. The die area is $1.09mm^2$

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.3
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• pp.313-321
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• 2014

A low-power low-cost polar transmitter for EDGE is designed in $0.18{\mu}m$ CMOS. A differential delta-sigma modulator (DSM) tunes a three-terminal voltage-controlled oscillator (VCO) to perform RF phase modulation, where the VCO tuning curve is digitally pre-compensated for high linearity and the carrier frequency is calibrated by a dual-mode low-power frequency-locked loop (FLL). A digital intermediate-frequency (IF) pulse-width5 modulator (PWM) drives a complementary power-switch followed by an LC filter to achieve envelope modulation with high efficiency. The proposed transmitter with 9mW power dissipation relaxes the time alignment between the phase and envelope modulations, and achieves an error vector magnitude (EVM) of 4% and phase noise of -123dBc/Hz at 400kHz offset frequency.

• Journal of Positioning, Navigation, and Timing
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• v.9 no.2
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• pp.43-50
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• 2020

In this paper a low power Spreading Code Authentication (SCA) sequence with a BPSK(1) modulation at a frequency offset of +7.161 MHz is tested for authentication purposes, the Galileo E1OS is used as base signal. The tested signals comprise a Galileo constellation with 5 satellites including the Galileo OS Navigation Message Authentication (OSNMA) and a low power offset BPSK (OBPSK(7,1)) as SCA component. The signals are generated with the software based MuSNAT-Signal-Generator. The generated signals were transmitted Over-The-Air (OTA) using a Software-Defined-Radio (SDR) as pseudolite. With a real-environment-testbed the performance of the SCA in real channel conditions (fading and multipath) was tested. A new SCA evaluation scheme is proposed and was implemented. Under real channel conditions we derive experimental threshold values for the new SCA evaluation scheme which allow a robust authentication. A Security Code Estimation and Replay (SCER) spoofing attack was mimicked on the real-environment-testbed and analyzed with the SCA evaluation scheme. It was shown that the usage of an OBPSK is feasible as an authentication method and can be used in combination with the OSNMA to improve the authentication robustness against Security SCER attacks.

• Journal of Electrical Engineering and Technology
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• v.7 no.4
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• pp.626-635
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• 2012

Most of single frequency GPS receivers utilize low-quality crystal oscillators. If a lowquality crystal oscillator is utilized as the time reference of a GPS receiver, the receiver's clock bias grows very fast due to its inherent low precision and poor stability. To prevent the clock bias becoming too large, large clock jumps are intentionally injected to the clock bias and the time offset for clock steering purpose. The abrupt changes in the clock bias and the time offset, if not properly considered, induce serious accuracy degradation in relative differential positioning. To prevent the accuracy degradation, this paper proposes an efficient and systematic method to eliminate the undesirable clock jump effects. Experiment results based on real measurements verify the effectiveness of the propose method.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.7
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• pp.77-80
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• 2008

In this paper, low phase noise VCO using novel compact microstrip spiral resonator is proposed. A spiral resonator has super compact dimension, low insertion losses in the passband and high level of rejection in the stopband with sharp cutoff and a large coupling coefficient value, which makes a high Q value, and has reduced the phase noise. To increase the tuning range of VCO, varactor diode has been connected at the tunable negative resistance in VCO. This VCO has presented the oscillation frequency of $5.686{\sim}5.841GHz$, harmonics -29.83 dBc and phase noise of $-115.16{\sim}-115.17dBc/Hz$ at the offset frequency of 100 KHz.

• Journal of IKEEE
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• v.11 no.1 s.20
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• pp.15-23
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• 2007

This paper describes a dual frequency synthesizer designed in a 0.2$\mu$m CMOS technology for wireless LAN applications. The design is focused mainly on low-power characteristics. Power dissipation is minimized especially in VCO and prescaler design. The designed synthesizer includes all building blocks for elimination of external components, other than the crystal. Its operating frequency can be programmed by external data. It operates in the frequency range of 2.3GHz to 2.7GHz (RF) and 250MHz to 800MHz (IF) and consumes 5.14mA at 2.5GHz and 1.08mA at 0.5GHz from a 2.5V supply. The measured phase noise is -85dBc/Hz in-band and -105dBc/Hz at 1MHz offset at IF band. The die area is 1.7mm$\times$1.7mm.

• Proceedings of the KIEE Conference
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• 2006.10c
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• pp.479-481
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• 2006

This paper describes a 2.5V, 320MHz low-noise and low-power Phase Locked Loop(PLL) using a noise-rejected Voltage Controlled ring Oscillator(VCO) fabricated in a TSMC 0.25um CMOS technology. In order to improve the power consumption and oscillation frequency of the PLL, The VCO consist of three-stage fully differential delay cells that can obtain the characteristic of high speed, low power and low phase noise. The VCO operates at 7MHz -670MHz. The oscillator consumes l.58mA from a 320MHz frequency and 2.5V supply. When the PLL with fully-differential ring VCO is locked 320MHz, the jitter and phase noise measured 26ps (rms), 157ps (p-p) and -97.09dB at 100kHz offset. We introduce and analysis the conditions in which ring VCO can oscillate for low-power operation.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.47 no.1
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• pp.30-40
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• 2010

The hard disk is one of the most frequently used storage in IPTV sep-top box. It has large storage capacity and provides fast I/O speed compared to its price whereas it causes high power consumption due to mechanical characteristics of spindle motor. In order to play streaming data in the set-top box, spindle motor of hard disk keeps active mode and it causes high power consumption. In this paper, We propose an offset-buffering and multi-mode spin-down method to reduce power consumption for streaming data playback. The offset-buffering inspects the user's viewing pattern and performs buffering based on the analysis of viewing pattern. So, it can maintain the status of spindle motor as idle mode for long time. Besides, it can reduce power consumption by spinning down according to offset-buffer size. The experimental result shows that proposed offset-buffering and multi mode spin-down method is about 28.3% and 12.5% lower than the full-Buffering method in terms of the power consumption and spin-down frequency, respectively.

• Korean Journal of Optics and Photonics
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• v.9 no.6
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• pp.408-412
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• 1998

As the radius of curvature of curved optical waveguide gets smaller, the loss increases at the junction of linear-curved waveguide by the cross sectional mode mismatch. The concept of lateral offset has been used widely to minimize it, and simple method of maximum matching has been efficient for most cases of silica waveguide with low optical confinement and large radius of curvature. Here, we analyzed that the propagation mode characteristics of the lateral offset and propagation mode characteristics of general case with effective index method and Airy function solution. As the normalized frequency varies, mode characteristics changes near the boundary of 1/V=0.7 and the simple matching of gaussian profile might give -35% of error at most. We proposed improved method with a new correction factor to improve the mode mismatch problem of conventional methods for general cases, and showed the convenience and feasibility of this method for the calculation of the lateral offset.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.303-304
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• 2008

In this paper, the performance of DSSS OQPSK architecture for 868/915MHz LR-WPAN(Low-Rate Wire less Personal Area Network) is analyzed. Since the frequency offset of ${\pm}40ppm$ on 868/915MHz band is recommended in IEEE 802.15.4 LR-WPAN specification. it is required to have a non-coherent detection that is stable operation in the channel environment with large frequency offset is required.