• Journal of Environmental Impact Assessment
• /
• v.32 no.5
• /
• pp.279-290
• /
• 2023

Recently, as wind farms using wind power as new and renewable energy have been installed nationwide, noise problems have emerged. The environmental impact assessment and post-environmental impact assessment also require the measurement of background noise and low-frequency noise for wind farms, especially by applying the living noise measurement method according to the low-frequency noise management guidelines issued by the Ministry of Environment in 2018. Due to the nature of wind power generators that generate loud noise in high winds, noise measurement should be made at high winds, but when wind speed increases, wind noise increases and living noise and low-frequency noise are not properly evaluated. Therefore, the type of noise generated by wind power generators was confirmed, and matters to be considered when measuring wind noise such as wind noise were confirmed.

• Proceedings of the KIEE Conference
• /
• 2006.07a
• /
• pp.127-128
• /
• 2006

The noise is major obstacle element in power line communication. However, because power supply networks are not designed for communication, there are various noise sources. Accordingly, a study of characteristic and cause of noise generated in low voltage transformer is important for outdoor power line communication. In this paper, we measure low voltage transformer noise in 1-30MHz using spectrum analyzer. We analyze cause and pattern of noise considering partial discharge.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
• /
• 2003.11a
• /
• pp.155-159
• /
• 2003

This paper presents fully integrated 5 GHz band low phase noise LC tank VCO. The implemented VCO is tuned by integrated PN diode and tuning rage is $5.01{\sim}5.30$ GHz under $0{\sim}3 V$ control voltage. For good phase noise performance, LC filtering technique, common in Si CMOS process, is used, and to prevent degradation of phase noise performance by collector shot-noise and to reduce power dissipation the HBT is biased at low collector current density bias point. The measured phase noise is -87.8 dBc/Hz at 100 kHz offset frequency and -111.4 dBc/Hz at 1 MHz offset frequency which is good performance. Moreover phase noise is improved by roughly 5 dEc by LC filter. It is the first experimental result in InGaP/GaAs HBT process. The figure of merit of the fabricated VCO with LC filter is -172.1 dBc/Hz. It is the best result among 5 GHz InGaP HBT VCOs. Moreover this work shows lower DC power consumption, higher output power and more fixed output power compared with previous 4, 5 GHz band InGaP HBT VCOs.

• Journal of information and communication convergence engineering
• /
• v.3 no.4
• /
• pp.184-186
• /
• 2005

The effect of power supply noise on the phase noise of a ring oscillator is studied. The power supply noise source in series with DC power supply voltage is applied to a 3 stage CMOS ring oscillator. The phase noise due to the power supply noise is modeled by the narrow band phase modulation. The model is verified by the fact that the spectrum of output of ring oscillator has two side bands at the frequencies offset from the frequency of the ring oscillator by the frequency of the power supply noise source. Simulations at several different frequency of the power supply noise reveals that the ring oscillator acts as a low pass filter to the power supply noise. This study, as a result, shows that the phase noise generated by the power supply noise is inversely proportional to the frequency offset from the carrier frequency.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.11 no.1
• /
• pp.59-64
• /
• 2011

A low noise and low power RF front-end for 5.8 GHz DSRC (Dedicated Short Range Communication) receiver is presented. The RF front-end is composed of a single-to-differential two-stage LNA and a Gilbert down-conversion mixer. In order to remove an external balun and 5.8 GHz LC load tuning circuit, a single-to-differential LNA with capacitive cross coupled pair is proposed. The RF front-end is fabricated in a 0.13 ${\mu}m$ CMOS process and draws 7.3 mA from a 1.2 V supply voltage. It shows a voltage gain of 40 dB and a noise figure (NF) lower than 4.5 dB over the entire DSRC band.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
• /
• 2007.11a
• /
• pp.1482-1489
• /
• 2007

In this paper, characteristics of infrasound and low-frequency noise emission from large modern wind turbines are experimentally investigated. The sound measurement procedures of IEC 61400-11 and ISO 7196 are utilized to field test and evaluation of noise emission from each of 1.5 MW and 660 kW wind turbines using the stall regulation and the pitch control for the power regulation, respectively. It was found that the G-weighted SPLs of low-frequency noise including infrasound shows positive correlation with the wind speeds, irrespective of methods of power regulation. This highlights the potential complaint of local community against the infrasound and low-frequency noise of wind turbines. The comparison of measured data with the existing hearing thresholds and criteria curves shows that it is highly probable that the low-frequency noise from the 1.5 MW and 660 kW wind turbines in the frequency range over 30 Hz leads to the psychological complaint of ordinary adults, and that the infrasound in the frequency range from 5 Hz to 8 Hz causes the complaint by rattling the house fitting such as doors and windows.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.6 no.8
• /
• pp.1297-1304
• /
• 2002

The phase locked oscillator having a low phase noise and high output in Ku-band was designed. To obtain the low phase noise and high output characteristics of oscillator, the nonlinear equivalent circuits of p-HEMT was analyzed by TOM method and we have decided the trade-off bias point between the low phase noise and the output power of oscillator. The designed phase locked oscillator with prescaler for stable operation, experiment results exhibits output power of 1003m with phase noise in the phase locked state of -824BC/HB at 10mz offset from 13.250Hz, and simulation result of 1003m output power in the phase noise -840Bc/Hz at 10KHz offset frequency respectively. a good agreement has been obtained between simulations and experiments results.

• Journal of Sensor Science and Technology
• /
• v.27 no.1
• /
• pp.31-35
• /
• 2018

This paper describes a low-power, SNDR (signal-to-noise and distortion ration) enhanced SAR (successive approximation register) type 12b ADC (analog-to-digital converter) with noise shaping technique. For low power consumption and small chip size of the DAC (digital-to-analog converter), the top plate sampling technique and the dummy capacitor switching technique are used to implement 12b operation with a 10b capacitor array in DAC. Noise shaping technique is applied to improve the SNDR by reducing the errors from the mismatching of DAC capacitor arrays, the errors caused by attenuation capacitor and the errors from the comparator noise. The proposed SAR ADC is designed with a $0.18{\mu}m$ CMOS process. The simulation results show that the SNDR of the SAR ADC without the noise shaping technique is 71 dB and that of the SAR ADC with the noise shaping technique is 84 dB. We can achieve the 13 dB improvement in SNDR with this noise shaping technique. The power consumption is $73.8{\mu}W$ and the FoM (figure-of-merit) is 5.2fJ/conversion-step.

• Journal of Sensor Science and Technology
• /
• v.32 no.6
• /
• pp.432-440
• /
• 2023

This study introduces an efficient readout circuit designed for two-electrode electrocardiogram (ECG) recording, characterized by its low-noise and low-power consumption attributes. Unlike its three-electrode counterpart, the two-electrode ECG is susceptible to common-mode interference (CMI), causing signal distortion. To counter this, the proposed circuit integrates a common-mode charge pump (CMCP) with a window comparator, allowing for a CMI tolerance of up to 20 V_PP. The CMCP design prevents the activation of electrostatic discharge (ESD) diodes and becomes operational only when CMI surpasses the predetermined range set by the window comparator. This ensures power efficiency and minimizes intermodulation distortion (IMD) arising from switching noise. To maintain ECG signal accuracy, the circuit employs a chopper-stabilized instrumentation amplifier (IA) for low-noise attributes, and to achieve high input impedance, it incorporates a floating high-pass filter (HPF) and a current-feedback instrumentation amplifier (CFIA). This comprehensive design integrates various components, including a QRS peak detector and serial peripheral interface (SPI), into a single 0.18-㎛ CMOS chip occupying 0.54 mm². Experimental evaluations showed a 0.59 µV_RMS noise level within a 1-100 Hz bandwidth and a power draw of 23.83 µW at 1.8 V.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.54 no.2
• /
• pp.53-57
• /
• 2017

This paper proposes a 401MHz-406MHz low noise amplifier for MedRadio applications. The proposed low noise amplifier adopts a common gate amplifier topology using current reuse gm-boosting technique. The proposed low noise amplifier shows better performance of voltage gain and noise figure than the conventional gm-boosted common gate amplifier in the same power consumption. The proposed current-reuse gm-boosted low noise amplifier achieves a voltage gain of 22 dB, a noise figure of 2.95 dB, and IIP3 of -17 dBm while consuming $170{\mu}W$ from a 0.5 V supply voltage in $0.13{\mu}m$ CMOS process.