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Video Transmission Method for Constant Video Quality in Next-Generation Wireless Networks (차세대 이동망에서 영상 품질을 보장하기 위한 전송 방법)

  • Park, Sang-Hyun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2007.06a
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    • pp.175-178
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    • 2007
  • According to recently presented QoS architecture by 3GPP, a traffic conditioner may be deployed to provide conformance of the negotiated QoS. A real-time frame-layer rate control method which can be applied to the traffic conditioner is proposed. The proposed rate control method uses a non-iterative optimization method for low computational complexity, and performs bit allocation at the frame level to minimize the average distortion over an entire sequence as well as variations in distortion between frames. The proposed algorithm does not produce time delay from encoding, and is suitable for real-time low-complexity video encoder.

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Aircraft derivative design optimization considering global sensitivity and uncertainty of analysis models

  • Park, Hyeong-Uk;Chung, Joon;Lee, Jae-Woo
    • International Journal of Aeronautical and Space Sciences
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    • v.17 no.2
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    • pp.268-283
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    • 2016
  • Aircraft manufacturing companies have to consider multiple derivatives to satisfy various market requirements. They modify or extend an existing aircraft to meet new market demands while keeping the development time and cost to a minimum. Many researchers have studied the derivative design process, but these research efforts consider baseline and derivative designs together, while using the whole set of design variables. Therefore, an efficient process that can reduce cost and time for aircraft derivative design is needed. In this research, a more efficient design process is proposed which obtains global changes from local changes in aircraft design in order to develop aircraft derivatives efficiently. Sensitivity analysis was introduced to remove unnecessary design variables that have a low impact on the objective function. This prevented wasting computational effort and time on low priority variables for design requirements and objectives. Additionally, uncertainty from the fidelity of analysis tools was considered in design optimization to increase the probability of optimization results. The Reliability Based Design Optimization (RBDO) and Possibility Based Design Optimization (PBDO) methods were proposed to handle the uncertainty in aircraft conceptual design optimization. In this paper, Collaborative Optimization (CO) based framework with RBDO and PBDO was implemented to consider uncertainty. The proposed method was applied for civil jet aircraft derivative design that increases cruise range and the number of passengers. The proposed process provided deterministic design optimization, RBDO, and PBDO results for given requirements.

Frame Skipping Algorithm for Minimization of Video Quality Variation (영상 품질 변화를 최소화하는 프레임 생략 알고리즘)

  • Park, Sang-Hyun;Lee, Sung-Keun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.8
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    • pp.1582-1588
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    • 2007
  • According to recently presented QoS architecture by 3GPP, a traffic conditioner may be deployed to provide conformance of the negotiated QoS. In this paper, a real-time frame-layer rate control method which can be applied to the traffic conditioner of 3GPP is proposed. The proposed rate control method uses an efficient frame skipping algorithm method for low computational complexity, and performs bit allocation at the frame level to minimize the average distortion over an entire sequence as well as variations in distortion between frames. The proposed algorithm does not produce time delay from encoding, and is suitable for real-time low-complexity video encoder.

Centroidal Voronoi Tessellation-Based Reduced-Order Modeling of Navier-Stokes Equations

  • 이형천
    • Proceedings of the Korean Society of Computational and Applied Mathematics Conference
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    • 2003.09a
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    • pp.1-1
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    • 2003
  • In this talk, a reduced-order modeling methodology based on centroidal Voronoi tessellations (CVT's)is introduced. CVT's are special Voronoi tessellations for which the generators of the Voronoi diagram are also the centers of mass (means) of the corresponding Voronoi cells. The discrete data sets, CVT's are closely related to the h-means clustering techniques. Even with the use of good mesh generators, discretization schemes, and solution algorithms, the computational simulation of complex, turbulent, or chaotic systems still remains a formidable endeavor. For example, typical finite element codes may require many thousands of degrees of freedom for the accurate simulation of fluid flows. The situation is even worse for optimization problems for which multiple solutions of the complex state system are usually required or in feedback control problems for which real-time solutions of the complex state system are needed. There hava been many studies devoted to the development, testing, and use of reduced-order models for complex systems such as unsteady fluid flows. The types of reduced-ordered models that we study are those attempt to determine accurate approximate solutions of a complex system using very few degrees of freedom. To do so, such models have to use basis functions that are in some way intimately connected to the problem being approximated. Once a very low-dimensional reduced basis has been determined, one can employ it to solve the complex system by applying, e.g., a Galerkin method. In general, reduced bases are globally supported so that the discrete systems are dense; however, if the reduced basis is of very low dimension, one does not care about the lack of sparsity in the discrete system. A discussion of reduced-ordering modeling for complex systems such as fluid flows is given to provide a context for the application of reduced-order bases. Then, detailed descriptions of CVT-based reduced-order bases and how they can be constructed of complex systems are given. Subsequently, some concrete incompressible flow examples are used to illustrate the construction and use of CVT-based reduced-order bases. The CVT-based reduced-order modeling methodology is shown to be effective for these examples and is also shown to be inexpensive to apply compared to other reduced-order methods.

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A fast block-matching algorithm using the slice-competition method (슬라이스 경쟁 방식을 이용한 고속 블럭 정합 알고리즘)

  • Jeong, Yeong-Hun;Kim, Jae-Ho
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.38 no.6
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    • pp.692-702
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    • 2001
  • In this paper, a new block-matching algorithm for standard video encoder is proposed. The algorithm finds a motion vector using the increasing SAD transition curve for each predefined candidates, not a coarse-to-fine approach as a conventional method. To remove low-probability candidates at the early stage of accumulation, a dispersed accumulation matrix is also proposed. This matrix guarantees high-linearity to the SAD transition curve. Therefore, base on this method, we present a new fast block-matching algorithm with the slice competition technique. The Candidate Selection Step and the Candidate Competition Step makes an out-performance model that considerably reduces computational power and not to be trapped into local minima. The computational power is reduced by 10%~70% than that of the conventional BMAs. Regarding computational time, an 18%~35% reduction was achieved by the proposed algorithm. Finally, the average MAD is always low in various bit-streams. The results were also very similar to the MAD of the full search block-matching algorithm.

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Fast Graphic Visualization of Frequency Response for Audio Equalizer (오디오 이퀄라이저를 위한 주파수 응답의 고속 그래픽 표현 방법)

  • Kim, Ki-Jun;Park, Hochong
    • Journal of Broadcast Engineering
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    • v.20 no.4
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    • pp.632-640
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    • 2015
  • This paper proposes a new method for fast graphic visualization of accurate frequency response of audio equalizer (EQ). When a logarithmic frequency scale is used, a frequency response in high resolution is required for accurate low-band frequency response. However, the high-resolution frequency response requires a huge amount of computational load, which makes the real-time graphic visualization of frequency response impossible. In order to solve the problem of computational load, the proposed method utilizes a low-resolution virtual frequency response in the mid band. It first computes the virtual frequency response of each filter of EQ in the mid band, and then moves it to the target band so that the result corresponds to the desired filter response. Then, it determines the final frequency response of EQ by combining all filter responses. The experiments confirm that the proposed method provides the frequency response of EQ which has an equivalent shape to that computed in high frequency resolution with huge computational load.

Simple Pyramid RAM-Based Neural Network Architecture for Localization of Swarm Robots

  • Nurmaini, Siti;Zarkasi, Ahmad
    • Journal of Information Processing Systems
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    • v.11 no.3
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    • pp.370-388
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    • 2015
  • The localization of multi-agents, such as people, animals, or robots, is a requirement to accomplish several tasks. Especially in the case of multi-robotic applications, localization is the process for determining the positions of robots and targets in an unknown environment. Many sensors like GPS, lasers, and cameras are utilized in the localization process. However, these sensors produce a large amount of computational resources to process complex algorithms, because the process requires environmental mapping. Currently, combination multi-robots or swarm robots and sensor networks, as mobile sensor nodes have been widely available in indoor and outdoor environments. They allow for a type of efficient global localization that demands a relatively low amount of computational resources and for the independence of specific environmental features. However, the inherent instability in the wireless signal does not allow for it to be directly used for very accurate position estimations and making difficulty associated with conducting the localization processes of swarm robotics system. Furthermore, these swarm systems are usually highly decentralized, which makes it hard to synthesize and access global maps, it can be decrease its flexibility. In this paper, a simple pyramid RAM-based Neural Network architecture is proposed to improve the localization process of mobile sensor nodes in indoor environments. Our approach uses the capabilities of learning and generalization to reduce the effect of incorrect information and increases the accuracy of the agent's position. The results show that by using simple pyramid RAM-base Neural Network approach, produces low computational resources, a fast response for processing every changing in environmental situation and mobile sensor nodes have the ability to finish several tasks especially in localization processes in real time.

Fast CU Encoding Schemes Based on Merge Mode and Motion Estimation for HEVC Inter Prediction

  • Wu, Jinfu;Guo, Baolong;Hou, Jie;Yan, Yunyi;Jiang, Jie
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.10 no.3
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    • pp.1195-1211
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    • 2016
  • The emerging video coding standard High Efficiency Video Coding (HEVC) has shown almost 40% bit-rate reduction over the state-of-the-art Advanced Video Coding (AVC) standard but at about 40% computational complexity overhead. The main reason for HEVC computational complexity is the inter prediction that accounts for 60%-70% of the whole encoding time. In this paper, we propose several fast coding unit (CU) encoding schemes based on the Merge mode and motion estimation information to reduce the computational complexity caused by the HEVC inter prediction. Firstly, an early Merge mode decision method based on motion estimation (EMD) is proposed for each CU size. Then, a Merge mode based early termination method (MET) is developed to determine the CU size at an early stage. To provide a better balance between computational complexity and coding efficiency, several fast CU encoding schemes are surveyed according to the rate-distortion-complexity characteristics of EMD and MET methods as a function of CU sizes. These fast CU encoding schemes can be seamlessly incorporated in the existing control structures of the HEVC encoder without limiting its potential parallelization and hardware acceleration. Experimental results demonstrate that the proposed schemes achieve 19%-46% computational complexity reduction over the HEVC test model reference software, HM 16.4, at a cost of 0.2%-2.4% bit-rate increases under the random access coding configuration. The respective values under the low-delay B coding configuration are 17%-43% and 0.1%-1.2%.

Removal of Complexity Management in H.263 Codec for A/VDelivery Systems

  • Jalal, Ahmad;Kim, Sang-Wook
    • 한국HCI학회:학술대회논문집
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    • 2006.02a
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    • pp.931-936
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    • 2006
  • This paper presents different issues of the real-time compression algorithms without compromising the video quality in the distributed environment. The theme of this research is to manage the critical processing stages (speed, information lost, redundancy, distortion) having better encoded ratio, without the fluctuation of quantization scale by using IP configuration. In this paper, different techniques such as distortion measure with searching method cover the block phenomenon with motion estimation process while passing technique and floating measurement is configured by discrete cosine transform (DCT) to reduce computational complexity which is implemented in this video codec. While delay of bits in encoded buffer side especially in real-time state is being controlled to produce the video with high quality and maintenance a low buffering delay. Our results show the performance accuracy gain with better achievement in all the above processes in an encouraging mode.

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Design of Low-Latency Architecture for AB2 Multiplication over Finite Fields GF(2m) (유한체 GF(2m)상의 낮은 지연시간의 AB2 곱셈 구조 설계)

  • Kim, Kee-Won;Lee, Won-Jin;Kim, HyunSung
    • IEMEK Journal of Embedded Systems and Applications
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    • v.7 no.2
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    • pp.79-84
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    • 2012
  • Efficient arithmetic design is essential to implement error correcting codes and cryptographic applications over finite fields. This article presents an efficient $AB^2$ multiplier in GF($2^m$) using a polynomial representation. The proposed multiplier produces the result in m clock cycles with a propagation delay of two AND gates and two XOR gates using O($2^m$) area-time complexity. The proposed multiplier is highly modular, and consists of regular blocks of AND and XOR logic gates. Especially, exponentiation, inversion, and division are more efficiently implemented by applying $AB^2$ multiplication repeatedly rather than AB multiplication. As compared to related works, the proposed multiplier has lower area-time complexity, computational delay, and execution time and is well suited to VLSI implementation.