• Journal of Digital Contents Society
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• v.13 no.4
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• pp.491-500
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• 2012

In this paper, a new loopback BIST structure which is effective to test RF transceiver chip and LNA(Low Noise Amplifier) in the chip is presented. Because the presented BIST structure uses a baseband processor in the chip as a tester while the system is under testing mode, the developed test technique has an advantage of performing test application and test evaluation in effectiveness. The presented BIST structure can change high frequency test output signals to a low frequency signals which can make the CUT(circuits under test) tested easily. By using this technique, the necessity of RF test equipment can be mostly reduced. The test time and test cost of RF circuits can be cut down by using proposed BIST structure, and finally the total chip manufacturing costs can be reduced.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.5
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• pp.713-718
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• 2016

Predicting precise specifications of differential mixed-signal circuits is a difficult problem, because analytically derived correlation between process variations and conventional specifications exhibits the limited prediction accuracy due to the phase unbalance, for most self-tests. This paper proposes an efficient prediction technique to provide accurate specifications of differential mixed-signal circuits in a system-on-chip (SoC) based on a nonlinear statistical nonlinear regression technique. A spectrally pure sinusoidal signal is applied to a differential DUT, and its output is fed into another differential DUT through a weighting circuitry in the loopback configuration. The weighting circuitry, which is employed from the previous work [3], efficiently produces different weights on the harmonics of the loopback responses, i.e., the signatures. The correlation models, which map the signatures to the conventional specifications, are built based on the statistical nonlinear regression technique, in order to predict accurate nonlinearities of individual DUTs. In production testing, once the efficient signatures are measured, and plugged into the obtained correlation models, the harmonic coefficients of DUTs are readily identified. This work provides a practical test solution to overcome the serious test issue of differential mixed-signal circuits; the low accuracy of analytically derived model is much lower by the errors from the unbalance. Hardware measurement results showed less than 1.0 dB of the prediction error, validating that this approach can be used as production test.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.12 no.6
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• pp.612-620
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• 1987

In this paper, the optical modem for data link realization is designed with the advantages of optical fiber, large bandwidth, high speed and long haul communication. Modem interface, CCITT V.24 and EIA RS-232C is adopted for the compatibility with existing systems, and biphase coding format is used for digital modulation. And also, modem has serveral loopback test facility in order to diagnose system itself. Optical transmitter and receiver are designed to have the receiving sensitivity of -30dBm at $10^-9$BER in the short wavelength region. Developed system is capable of transmitting data rate at 1200bps up to 57.6Kbps in sync., and at any bps within DC to 200Kbps in async transmission.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.4A
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• pp.387-393
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• 2008

In this paper, we present an SDR (Software Defined Radio) handset modem platform which supports communication systems such as HSDPA (High Speed Downlink Packet Access), and WiBro (Wireless Broadband Portable Internet). The proposed SDR platform employs DSPs (Digital Signal Processors), FPGAs (Field Programmable Gate Arrays), and microprocessors in such a way that the various communication functions like HSDPA and WiBro can be programmed and downloaded to the hardware platform. The proposed SDR platform can be used for functional verification of the physical layers of the mobile handset system in the mobile communication network. We first demonstrate the receiving structure of the physical layer of the HSDPA and WiBro system. Then, the hardware implementation of the proposed SDR platform is shown with functions and optimized signal flows required at each mode. Finally, the link performance of each mode operating on the proposed SDR platform is presented through the internal loopback tests with the test vectors. The experimental performance has been compared with the computer simulation results.

• Proceedings of the Acoustical Society of Korea Conference
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• spring
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• pp.52-55
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• 1999

다중 전송율(16, 24, 32, 40kbps)을 제공하는 G.726 부호화기는 ADPCM (Adaptive Differential Pulse Code Modulation) 부호화법을 사용한다. 본논문에서는 G.726 ADPCM 알고리즘을 C&S Technology에서 개발한 음성 신호 처리를 위한 범용 DSP인 CSD17C00A 칩을 이용하여 실시간 응용이 가능하도록 구현하였다. G.726에 대한 양방향 평가는 Codec Loopback test을 통해 수행되었으며, W-T에서 제공한 테스트 절차에 따라 평가되었다. 본 논문에서 구현된 G.726 부호화기는 평균 11 MIPS의 계산 속도를 갖고, 프로그램 메모리 크기는 2.8K Words이고, 데이터 메모리 크기는 550 Words 를 필요로 하였다.

• Proceedings of the KOSOMBE Conference
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• v.1993 no.05
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• pp.129-131
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• 1993

A transcutaneoos information transmission system using transmitted infrared light for an implantable total artificial heart(TAH) an developed and the performance of the system was tested. In an in vitro test, transmittance of the developed system was measured through various thicknesses of pig shins. In an in vivo test, a loopback test using a personal computer was performed to determine the error rate and an experiment using a mock system was taken. In this experiment, within acceptable lateral and vertical displacements, the error rate of at least 3.8E-6 was guaranteed. Monitoring signals from the internal controller(Intel 87C196) of the mock system were successfully transmitted to the external controller(IBM PC) and the operating commands from the external controller were successfully conducted by the mock system. Communication was done in half duplex mode according to RS-232 protocol at the speed of 4800 bps.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.37 no.2
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• pp.187-192
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• 2009

Telecommand & telemetry control equipment is needed for the testing of the transponders during the development of satellite. This equipment must have a loopback function to perform the self testing without satellite. The fabrication of the designed system is easier and cheaper than the conventional testing system using direct modulation method. The measured results of fabricated equipment are satisfied with required specifications. A overall path loss of uplink and downlink is 47.8 dB and 42.6 dB, respectively. Also, IMD3 of uplink has measured 60.68 dBc at an output of -50 dBm.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.4
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• pp.984-995
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• 1996

Data errors according to the various noises caused in the satellite communication links are corrected by the Viterbi decoding algorithm which has extreme error correcting capability. In this paper, we designed and implemented a convolutional encoder and Viterbi decoder ASIC which is used to encode the input data at the transmit side and correct the errors of the received data at the receive side for use in the VSAT communication system. And this chip may be used in any BPSK, QPSK, or OQPSK transmission system. The ambiguity resolver corrects PSK modem ambiguities by delaying, interting, and/or exchanging code symbol to restore their original sequence and polarity. In case of previous decoding system, ambiguity state(AS) of data is resolved by external control logic and extra redundancy data are needed to resolve AS. But, by adopting decoder proposed in this paper, As of data is resolved automatically by internal logic of decoder in case of continuous mode, and by external As line withoug extra redudancy data in burst mode case. So, decoding parts are simple in continuous mode and transmission efficiency is increased in bust mode. The features of this chip are full duplex operation with independent transmit and receive control and clocks, start/stop inputs for use in burst mode systems, loopback function to verify encoder and decoder, and internal or external control to resolve ambinguity state. For verification of the function and performance of a fabricated ASIC chip, we equiped this chip in the Central and Remote Earth Station of VSAT system, and did the performance test using the commerical INTELSAT VII under the real satellite link environmens. The results of test were demonstrated the superiority of performance.