• International Journal of Control, Automation, and Systems
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• 제5권2호
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• pp.111-116
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• 2007

The design problem of partial pole assignment (PPA) in two classes of frequency-domain MIMO models by constant gain feedback is investigated in this paper. Its aim is to design a constant gain feedback which changes only a subset of the open-loop eigenvalues, while the rest of them are kept unchanged in the closed-loop system. A near general parametric expression for the feedback gain matrix in term of a set of design parameter vectors and the set of the closed-loop poles, and a simple parametric approach for solving the proposed problem are presented. The set of poles do not need to be previously prescribed, and can be set undetermined and treated together with the set of parametric vectors as degrees of design freedom provided by the approach. An illustrative example shows that the proposed parametric method is simple and effective.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권3호
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• pp.319-329
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• 2016

High-level design aids are mandatory for design of a continuous-time delta-sigma modulator (CTDSM). This paper proposes a top-down methodology design to generate a noise transfer function (NTF) which is compensated for excess loop delay (ELD). This method is applicable to low pass loop-filter topologies. Non-ideal effects including ELD, integrator scaling issue, finite op-amp performance, clock jitter and DAC inaccuracies are explicitly represented in a behavioral simulation of a CTDSM. Mathematical modeling using MATLAB is supplemented with circuit-level simulation using Verilog-A blocks. Behavioral simulation and circuit-level simulation using Verilog-A blocks are used to validate our approach.

• 한국정보통신학회논문지
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• 제15권7호
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• pp.1552-1558
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• 2011

본 논문에서는 전압제어지연단(Voltage Controlled Delay Line : VCDL)을 이용하여 기존의 위상고정루프와 다른 형태의 위상 지연고정루프(Phase Delay Locked Loop)를 제안하였다. 이 구조를 이용하여 기존의 위상고정루프의 2차 또는 3차 루프필터(Loop Filter)를 단하나의 커패시터로 구현하여 칩의 크기를 크게 줄였다. 새로이 제안하는 듀얼루프 위상 자연고정루프에서는 전압제어지연단 경로의 커패시터와 전하펌프의 전류 크기를 조절함으로서 작은 이득 값을 가지는 전압제어지연단을 사용할 수 있다. 제안된 회로는 $0.18{\mu}m$ CMOS 공정의 파라미터를 이용하여 Hspice로 시뮬레이션을 수행하고 회로의 동작을 검증하였다.

• 조명전기설비학회논문지
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• 제21권4호
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• pp.80-87
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• 2007

This paper will suggest that the 1 cross orthogonal loop type sensor improves on the orthogonal loop form sensor-head, which is available a calibration of the linear birefringence, when a fiber optic current sensor was composed. An output characteristics of the 1 cross orthogonal loop form, a general closed loop form, the orthogonal loop form are compared by the IEC(International Electrotechnical Commission) 60044-8 standard, and the state of polarization is compared with three forms. As a result, when the closed loop form was changed to the orthogonal loop form, retardation decreased 15.3[%]. When the closed loop form was changed to the 1 cross orthogonal loop type, the retardation decreased 33.8[%]. As a result of the Faraday Effect measurement, the 1 cross orthogonal loop form has the highest output characteristic and the lowest error ratio. It met the 0.5 class of the IEC 60044-8 standard. Thus, in application of the 1cross orthogonal loop form, the possibility to develop high reliability fiber optic current sensors that have a high output and stable error ratio rises is increased.

• Nuclear Engineering and Technology
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• 제28권5호
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• pp.440-451
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• 1996

With emphasis on safety, this study addresses for better design condition for the cooling system in a wet-type interim spent fuel storage facility, using a probabilistic safety assessment method. To incorporate the design renovation into the design phase, a simple approach is proposed. By taking the cooling system of a reference design, a fault tree analysis was performed to identify the weak point of the considered system, and then basic factors for design renovation were defined. A total of 21 design alternatives were selected through the combination of the basic factors. Finally, the optimum design alternative for the cooling system is derived by means of the cost and effect analysis based on the estimated cost, system reliability and assumed probabilistic safety criteria. With the assumption that the failure frequency of at-reactor spent fuel cooling system compiles with probabilistic safety criteria for the interim spent fuel cooling system, it was shown that the optimum alternative should have l00% cooling loop redundancy with one pump per cooling loop and a cleanup system installed separately from the main loop. Furthermore, it also should be classified into safety system. The result of this study can be used as a useful basis to identify factors of safety concern and to establish design requirements in the future. The method also can be applied for other nuclear facilities.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 A
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• pp.83-86
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• 2002

In this study, we evaluate the effectiveness of a switch installation between on the radial and loop lateral feeders to increase reliability by decreasing the duration of the outage. These results can help power utility to design the switch layouts on the radial and loop lateral feeder system.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1992년도 한국자동제어학술회의논문집(국내학술편); KOEX, Seoul; 19-21 Oct. 1992
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• pp.747-753
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• 1992

The modeling and control design schemes are developed for maglev systems with a combined lift and guidance. First, bond graph techniques are applied for modeling these multi-energy domain systems more logically and systematically. And the stability loop via pole placement and the performance loop via loop-shaping LQ control are designed. The suggested controller satisfies the required characteristics of stability and performance simultaneously. Finally, the robustness of the synthesized maglev control system is evaluated for the variations of air gap and vehicle mass through computer simulation.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1992년도 한국자동제어학술회의논문집(국내학술편); KOEX, Seoul; 19-21 Oct. 1992
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• pp.112-116
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• 1992

In this paper, a fuzzy logic controller(FLC) is designed for the pointing loop of the spin-stabilized platform. For the fuzzy inference, a fuzzy accelerator board using the Togai InfraLogic software and digital fuzzy processor(DFP110FC) is designed, and a validation of an algorithm for fuzzy logic control is also presented. The pointing loop of the spin-stabilized platform using FLC has better performance of step responses than a proportional controller in case of same loop hain through the software simulation and the experiment of implemented hardware.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.163-166
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• 1999

In this paper, frequency synthesizer that can be used in IMT-2000 was designed and fabricated using dual loop PLL(Phase Locked Loop). For improving phase noise characteristic Voltage Controlled Oscillator was fabricated using coaxial resonator and eliminated frequency divider using SPD as phase detector and increased open loop gain. Fabricated frequency synthesizer had 1.82㎓ center frequency, 160MHz tuning range and -119.73㏈c/Hz low phase noise characteristic.

• Journal of information and communication convergence engineering
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• 제8권5호
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• pp.489-492
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• 2010

This paper proposes the planar-type modified monopole antennas of loop structure. This antenna has an opened center of a conventional closed loop structure with an inside-folded terminal of the loop microstrip line. The size of the proposed antenna was minimized by folding the end of the loop. Also, the reactance value has been minimized by increasing capacitances between the coupled microstrip line. Therefore the proposed antenna has been compacted to about 20% from a conventional loop antenna and has increased its efficiency. The proposed antennas have an omni-directional pattern, the antenna gain was 3.67 [dBi] and the bandwidth was 900 MHz (2.6~3.56 GHz) with VSWR$\leq$2 from the simulated and the measured results. The frequency utilization coefficient was 29.9%. These properties could satisfy the S-DMB band.