• Title/Summary/Keyword: Loop Detection

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An Analysis of a Phase Locked AM signal Detection (위상고정회로를 사용한 AM신호 검파방식의 해석)

  • 문상재
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.13 no.5
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    • pp.24-29
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    • 1976
  • In the phase locked AM signal detection, phase locked loop is used to extract a synchronous carrier from an input AM signal. Under the assumption that input noise is white Gaussian and free-running frequency of voltage controlled oscillator is the same that of an input carrier, operational behaviours of phase locked loop is analyzed and signal to noise ratio of the detection is derived quentitatively. The results show that the phase locked AM signal detection method offers a higher degree of noise mmunity than conventional AM signal detections.

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An algorithm for pahse detection using weighting function and the design of a phase tracking loop (가중치 함수를 이용한 위상 검출 알고리즘과 위상 추적 루프의 설계)

  • 이명환
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.9A
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    • pp.2197-2210
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    • 1998
  • In the grand alliance (GA) HDTV receiver, a coherent detection is empolyed for coherent demodulation of vestigial side-band (VSB) signal by using frequency and phaselocked loop(FPLL) operating on the pilot carrier. Additional phase tracking loop (PTL) employed to track out phase noise that has not been removed by the FPLL in theGA system. In this paper, we propose an algorithm for phase detection which utilizes a weighting function. The simplest implementation of the proposed algorithm using te sign of the Q channel component can be tractable by imposing a phase detection gain to the loop gain. It is obserbed that the propsoed algorithm has a robust characteristic against the performance of the digital filters used for Q channel estimation. A second goal of this paper is to introduce a gain control algorithm for the PTL in order to provide an effective implementation of the proposed phase detection algorithm. And we design the PTL through the realization of the simplified digital filter for H/W reduction. The proposed algorithms and the designed PTL are evaluated by computer simulation. In spite of using the simplified H/W structure, simulation results show that the proposed algorithms outperform the coventional PTL algorithms in the phase detection and tracking performance.

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Detection of Salmonella typhi by Loop-mediated Isothermal Amplification Assay

  • Jo, Yoon-Kyung;Lee, Chang-Yeoul
    • Biomedical Science Letters
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    • v.14 no.2
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    • pp.115-118
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    • 2008
  • Salmonella typhi is frequent causes of foodborne illness and its detection is important for monitoring disease progression. In this study, by using general PCR and novel LAMP (Loop Mediated Isothermal Amplification) assay, we evaluated the usefulness of LAMP assay for detection of Salmonella typhi. In this LAMP assay, forward inner primer (FIP) and back inner primer (BIP) was specially designed for recognizing target invA gene. Target DNA was amplified and visualized as ladder-like pattern of bands on agarose gel within 60 min under isothermal conditions at $65^{\circ}C$. When the sensitivity and reproducibility of LAMP were compared to general PCR, there was no difference of reproducibility but sensitivity of LAMP assay was more efficient than PCR (the detection limit of LAMP assay was 30 fg, while the PCR assay was 3 pg). These results indicate that the LAMP assay is a potential and valuable means for detection of Salmonella typhi, especially for its rapidity, simplicity and low cost.

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A New Islanding Detection Method using Phase-Locked Loop for Inverter-Interfaced Distributed Generators

  • Chung, Il-Yop;Moon, Seung-Il
    • Journal of Electrical Engineering and Technology
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    • v.2 no.2
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    • pp.165-171
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    • 2007
  • This paper proposes a new islanding detection method for inverter-interfaced distributed generators (DG). To detect islanding conditions, this paper calculates the phase angle variation of the system voltage by using the phase-locked loop (PLL) in the inverter controllers. Because almost all inverter systems are equipped with the PLL, the implementation of this method is fairly simple and economical for inverter-interfaced DGs. The detection time can also be shortened by reducing communication delay between the relays and the DGs. The proposed method is based on the fact that islanding conditions result in the frequency and voltage variation of the islanded area. The variation depends on the amount of power mismatch. To improve the accuracy of the detection algorithm, this paper injects small low-frequency reactive power mismatch to the output power of DG.

Development of Joint Controller and Collision Detection Methods for Series Elastic Manipulator of Relief Robot (구호로봇용 연성 매니퓰레이터를 위한 조인트 제어 및 충돌감지 알고리즘)

  • Jung, Byung-jin;Kim, Tae-Keun;Won, Geon;Kim, Dong Sup;Hwang, Junghun
    • The Journal of Korea Robotics Society
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    • v.13 no.3
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    • pp.157-163
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    • 2018
  • This paper deals with the development and application of control algorithms for series elastic relief robots for rescue operations in harsh environment like disasters or battlefield. The joint controller applied in this paper has a cascade structure combining inner loop for torque control and outer loop for position control. The torque loop contains feedforward and feedback controller and disturbance observer for independent, decentralized joint control. The effect of the elastic component and motor dynamics are treated as the nonlinear disturbance and compensated with the disturbance observer of torque controller. For the collision detection, Band Designed Disturbance Observer is configured to recognize/respond to external disturbance robustly in the continuously changing environment. The controller is applied to a 7-dof series elastic manipulator to evaluate the torque tracking and collision detection/response performance.

Loop-mediated isothermal amplification assay for the detection of Salmonella spp. in pig feces

  • Kim, Yong Kwan;Kim, Ha-Young;Jeon, Albert Byungyun;Lee, Myoung-Heon;Bae, You-Chan;Byun, Jae-Won
    • Korean Journal of Veterinary Research
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    • v.54 no.2
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    • pp.113-115
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    • 2014
  • Salmonella are causative agents of gastroenteritis and systemic disease in animals. The invA gene was selected as a target sequence of loop-mediated isothermal amplification (LAMP) assay for diagnosis of Salmonella infection. The detection limits for broth dilution, spiked feces and enrichment were $10^4$, $10^5$ and $10^2$ CFUs/mL, respectively. The LAMP assay developed in the present study may be a reliable method for detection of Salmonella spp. in pig feces.

LOW-DENSITY CLOSE-CLOSED LOOP BURST ERROR DETECTING CODES

  • Dass, Bal-Kishan;Jain, Sapna
    • Journal of applied mathematics & informatics
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    • v.9 no.1
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    • pp.231-238
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    • 2002
  • In this paper, we study cyclic codes detecting a subclass of close-closed loop bursts viz. low-density close-closed loop bursts. A subclass of CT close-closed loop berets called CT low-density close-closed loop bursts is also studied.

Loop Splitting for On-the-fly Race Detection of Sharded-memory Parallel Programs (공유 메모리 병렬 프로그램의 수행중 오류 탐지를 위한 루프 분리)

  • Song, Tae-Seob
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.3
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    • pp.391-398
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    • 2012
  • Detecting races is important for debugging shared-memory parallel programs, because the races result in unintended non-deterministic executions of the programs. Previous on-the-fly techniques to detect races in parallel programs with general inter-thread coordination show serious space overhead which depends on the maximum parallelism of the program. Therefore, this paper presents a loop splitting technique for on-the-fly race detection of parallel programs which is more efficient in space complexity than previous techniques. This loop splitting technique is the debugged program which preserves semantics of the original program. Monitering loop splitting program in on-the-fly can detect first races.

Simple and Rapid Detection of Potato leafroll virus by Reverse Transcription Loop-mediated Isothermal Amplification

  • Ju, Ho-Jong
    • The Plant Pathology Journal
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    • v.27 no.4
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    • pp.385-389
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    • 2011
  • A new reverse transcription loop-mediated isothermal amplification (RT-LAMP) method for the Potato leafroll virus (PLRV) was developed and compared with conventional reverse transcription polymerase chain reaction (RT-PCR) to address its advantages over RTPCR. RT-LAMP primers were designed from the open reading frame 3 (ORF3) sequence of PLRV. The RT-LAMP reactions were conducted without or with a set of loop primers. By real-time monitoring using Turbimeter, the RT-LAMP (with loop primers) detects PLRV in less than 30 min, compared to 120 min of RT-PCR. By adding fluorescent reagent during the reaction, final products of the RT-LAMP were fluorescently visualized under UV light or could be differentiated by naked-eye inspection under normal light. The RT-LAMP was extremely sensitive, about 2000-fold more sensitive than RT-PCR. This study presents great potential of the RT-LAMP for diagnosis and PLRV epidemiology because RT-LAMP method is speedy, sensitive, inexpensive, and convenient.

A 1.248 Gb/s - 2.918 Gb/s Low-Power Receiver for MIPI-DigRF M-PHY with a Fast Settling Fully Digital Frequency Detection Loop in 0.11 ㎛ CMOS

  • Kim, Sang-Yun;Lee, Juri;Park, Hyung-Gu;Pu, Young Gun;Lee, Jae Yong;Lee, Kang-Yoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.4
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    • pp.506-517
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    • 2015
  • This paper presents a 1.248 Gb/s - 2.918 Gb/s low-power receiver MIPI-DigRF M-PHY with a fully digital frequency detection loop. MIPI-DigRF M-PHY should be operated in a very short training time which is $0.01{\mu}s$ the for HS-G2B mode. Because of this short SYNC pattern, clock and data recovery (CDR) should have extremely fast locking time. Thus, the quarter rate CDR with a fully digital frequency detection loop is proposed to implement a fast phase tracking loop. Also, a low power CDR architecture, deserializer and voltage controlled oscillator (VCO) are proposed to meet the low power requirement of MIPI-DigRF M-PHY. This chip is fabricated using a $0.11{\mu}m$ CMOS process, and the die area is $600{\mu}m{\times}250{\mu}m$. The power consumption of the receiver is 16 mW from the supply voltage of 1.1 V. The measured lock time of the CDR is less than 20 ns. The measured rms and peak jitter are $35.24ps_{p-p}$ and $4.25ps_{rms}$ respectively for HS-G2 mode.