• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.6
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• pp.128-133
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• 1994

This paper proposes a new TTL-to-CMOS converter which has low power dissipation. This converter has no static power dissipation for typical TTL output voltage levels. The simulatio result shows that the power dissipation is reduced to about 1/20 of conventional level converter using CMOS inverters. It also has hysteresis due to the positive feedback which makes the converter noise immune. The logic threshold voltages in the hysteresis characteristic can be optimized by changing the size ratios of the transistors.

• Proceedings of the Korea Association of Crystal Growth Conference
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• 1996.06a
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• pp.88-138
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• 1996

Electronics grew up to the largest industry in the world supported by Si wafer. In near future, the Si wafer may use 300mm in diameter for economic requirement. This size wafer may use to produce large logic chip, 256Mbit DRAM, and other large complex and high density chip. Then, the quality including flatness and crustal characters may be required very high performance. And, their price should be reasonable and high quantity may be required. These requirements should be solve lot of hard problems of crystal growth, wafering mechanical processing and their cost problems. In this presentation, I may discuss following items.

• 한국신재생에너지학회:학술대회논문집
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• 2009.06a
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• pp.588-591
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• 2009

Ground source heat pump system; GSHPs is close to most practical use for early stage investment cost and energy efficiency in new renewable energies, and currently considered utilizing to the heat and cooling system of a building. Particularly, the case to utilize 'Standing Column well heat source gathering method' in the open standards process to have the excellent capability of gathering geothermal source is increased. But the research for the optimal design technology and the assessment of a pollution level of the ground to utilize a single well for gathering geothermal is insignificant and the design is insufficient. The heating and cooling system and the equipment to utilize a large size residential development to have over 1000 households have not developed yet. Therefore, our company developed 'geothermal hybrid system' which can construct the heat and cooling system using geothermal energy for a large size residential development of over 1000 households and conducted the evaluation of economic feasibility. Moreover we developed automatic equipment for gathering geothermal source and PLC (Programmable logic controller) to have optimal efficiency and FCU (fan coil unit) considering the floors of large size apartments.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.09a
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• pp.109-119
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• 2003

o In order to start SIP Project .Marketing (& ASIC team) should present biz planning, schedule, device/SIP specs., in SIP TFT prior to request SIP development for package development project. .In order to prevent (PCB) revision, test, burn-in, & quality strategy should be fixed by SIP TFT (PE/Test, QA) prior to request for PKG development. .Target product price/cost, package/ test cost should be delivered and reviewed. o Minimum Information for PCB Design, Package Size, and Cost .(Required) package form factor: size, height, type (BGA, QFP), Pin count/pitch .(Estimated) each die size including scribe lane .(Estimated) pad inform. : count, pitch, configuration(in-line/staggered), (open) size .(Estimated) each device (I/O & Core) power (especially for DRAM embedded SIP) .SIP Block diagram, and net-list using excel sheet format o Why is the initial evaluation important\ulcorner .The higher logic power resulted in spec. over of DRAM Tjmax. This caused business drop longrightarrow Thermal simulation of some SIP product is essential in the beginning stage of SIP business planning (or design) stage. (i.e., DRAM embedded SIP) .When SIP is developed using discrete packages, the I/O driver Capa. of each device may be so high for SIP. Since I/O driver capa. was optimized to discrete package and set board environment, this resulted in severe noise problem in SIP. longrightarrow In this case, the electrical performance of product (including PKG) should have been considered (simulated) in the beginning stage of business planning (or design).

• Journal of Internet Computing and Services
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• v.10 no.4
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• pp.115-126
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• 2009

A software size estimation has to be analyzed in the beginning of the software life-cycle and helpful to the prediction of its size and cost. The software cost has been calculated by estimating software size from the user's point of view since the function point method based on international standards was introduced for the estimation of software size in 2004. However, the current function point method is not easy to be exploited for unfamiliar user, and has a problem that it cannot estimate the proper size for software such as engineering software, scientific calculations and simulation with complicated internal computational logic. This paper presents an improved model which can simplify the existing function point measurement procedure, and perform the estimation of software size in easy and fast way at the initial stage of project. Moreover, it presents a mathematical weighted value calculation model which can solve the problem of the fixed complexity weighted value and reflect the characteristics of organization as its data is pilled up. Our evaluation shows that the presented model has advantage that it can measure the size more rapidly than the existing FPA methods and has more correlation with LOC.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.8 no.1
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• pp.31-36
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• 2008

This paper presents adaptive learning data of evolvable neural networks (ENNs) for time series prediction of nonlinear dynamic systems. ENNs are a special class of neural networks that adopt the concept of biological evolution as a mechanism of adaptation or learning. ENNs can adapt to an environment as well as changes in the enviromuent. ENNs used in this paper are L-system and DNA coding based ENNs. The ENNs adopt the evolution of simultaneous network architecture and weights using indirect encoding. In general just previous data are used for training the predictor that predicts future data. However the characteristics of data and appropriate size of learning data are usually unknown. Therefore we propose adaptive change of learning data size to predict the future data effectively. In order to verify the effectiveness of our scheme, we apply it to chaotic time series predictions of Mackey-Glass data.

• 한국신재생에너지학회:학술대회논문집
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• 2009.06a
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• pp.328-330
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• 2009

1 kW class Polymer Electrolyte Fuel Cell(PEFC) co-generation systems have been developed from 2001 and evaluated for improvement of efficiency, durability and reliability of the system. This paper introduce new version system including with excellent reliability, durability and user friendly applications. Its electrical and overall efficiency showed 35 % and 80 %, respectively, and noise level of the system was less than 45 dB. In addition, this system have various functions such as load change, $N_2$ less purge, low emission and low temperature operation ($-15^{\circ}C$) through development of operation logic. This system was designed for convenient installation in indoor and outdoor due to the compactness of size and the separation of electrical and heat recovery units, which means a user can select the size of heat recovery unit.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.5
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• pp.775-783
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• 1990

In this paper we implemented the fast thinning unit by modifying the pipeline architecture which was proposed by Stanley R. Sternberg. The unit is useful in preprocessing such as image representation and pattern recognition etc. This unit is composed of interface part, local memory part, address generation part, thinning processing part and control part. In thinning processing part, we shortened the thinning part which performed by means of look up table using window mapping table. Thus we improved the weakness of SAP, in which the number of delay pipeline and window pipeline are equal to image column size. Two independent memorys using tri-state buffer enable the two direction flow of address generated by address generation part. This unit avoids the complexity of architecture and has flexibility of image size by means of simple modification of logic bits.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.9 no.2
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• pp.141-146
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• 2009

Support vector machine is a classification algorithm based on statistical learning theory. It has shown many results with good performances in the data mining fields. But there are some problems in the algorithm. One of the problems is its heavy computing cost. So we have been difficult to use the support vector machine in the dynamic and online systems. To overcome this problem we propose to use stratified sampling of statistical sampling theory. The usage of stratified sampling supports to reduce the size of training data. In our paper, though the size of data is small, the performance accuracy is maintained. We verify our improved performance by experimental results using data sets from UCI machine learning repository.

• Proceedings of the Korean Information Science Society Conference
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• 2006.10a
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• pp.449-453
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• 2006

DRAM과 고밀도집적회로가 병합된 시스템에서는 메모리와 프로세서간에 넓은 대역폭을 갖을 수 있다. 이런 조건에서 넓은 대역폭을 효율적으로 이용할 수 있는 D-VLS(Dynamically Variable Line Size) 캐쉬가 제안되었다. D-VLS 캐쉬는 프로그램이 실행 되면서 그 프로그램의 특성을 추적하며 적절한 캐쉬 라인 사이즈를 선택함으로써 시스템 성능향상을 목표로 한다. 본 논문에서는 D-VLS 캐쉬에서 캐쉬 라인 사이즈를 결정하는 알고리즘을 개선하고자 한다. 개선된 알고리즘을 적용한 결과 기존의 D-VLS 캐쉬보다 평균 메모리 접근 시간이 3.73% 정도 향상되었다.