• Journal of Practical Engineering Education
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• v.9 no.1
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• pp.41-48
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• 2017

In this paper, we proposed a method for digital logic circuit control, through arduino device programming with digital outputs, to design a curriculum for basic digital logic circuit practices. Curricula for arduino device programming and digital logic circuit are essentially practiced in engineering departments of colleges or high schools in South Korea. However, actual practice course lacks the experimental examples of digital logic circuit combined with arduino device programming. Furthermore, actual practice course lacks the curriculum in that students design and test their own digital logic circuits with the less cost than the oscilloscope. Therefore, to solve these problems in this paper, we proposed a curriculum for basic digital logic circuit practices during one semester. In this curriculum, students control and experiment their own digital logic circuits through arduino device programming with digital outputs.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 2000.04a
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• pp.617-620
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• 2000

In this paper, we show an application of constraint logic programming to the operation scheduling on machines in a job shop. Constraint logic programming is a new genre of programming technique combining the declarative aspect of logic programming with the efficiency of constraint manipulation and solving mechanisms. Due to the latter feature, combinatorial search problems like scheduling may be resolved efficiently. In this study, the jobs that consist of a set of related operations are supposed to be constrained by precedence and resource availability. We also explore how the constraint solving mechanisms can be defined over a scheduling domain. Thus the scheduling approach presented here has two benefits: the flexibility that can be expected from an artificial intelligence tool by simplifying greatly the problem; and the efficiency that stems from the capability of constraint logic programming to manipulate constraints to prune the search space in an a priori manner.

• Journal of the Korean Operations Research and Management Science Society
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• v.27 no.4
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• pp.87-109
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• 2002

A satisfiability problem in propositional logic is the problem of checking for the existence of a set of truth values of atomic prepositions that renders an input propositional formula true. This paper describes an empirical investigation of a particular integer programming approach, using the set covering model, to solve satisfiability problems. Our satisfiability engine, SETSAT, is a fully integrated, linear programming based, branch and bound method using various symbolic routines for the reduction of the logic formulas. SETSAT has been implemented in the integer programming shell MINTO which, in turn, uses the CPLEX linear programming system. The logic processing routines were written in C and integrated into the MINTO functions. The experiments were conducted on a benchmark set of satisfiability problems that were compiled at the University of Ulm in Germany. The computational results indicate that our approach is competitive with the state of the art.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 1997.11a
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• pp.79-89
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• 1997

Logic programming has many advantages as a paradigm for parallel programming because it offers ease of programming while retaining high expressive power due to its declarative semantics. In parallel logic programming, one of the important issues is the compile-time parallelism detection. Static data-dependency analysis has been widely used to gather some information needed for the detection of AND-parallelism. However, the static data-dependency analysis cannot fully detect AND-parallelism because it does not provide some necessary functions such as the propagation of groundness. As an alternative approach, abstract interpretation provides a promising way to deal with AND-parallelism detection, while a full-blown abstract interpretation is not efficient in terms of computation since it inherently employs some complex operations not necessary for gathering the information on AND-parallelism. In this paper, we propose an abstract domain which can provide a precise and efficient way to use the abstract interpretation for the detection of AND-parallelism of logic programs.

• Journal of Engineering Education Research
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• v.18 no.6
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• pp.46-51
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• 2015

Recently, Information Communication Technology(ICT) is one of the most important technology that supports the modern society. As the ICT rises, the needs of the nurturing talents, who can develop a service or hardware on the basis of the humanities increases. As a result, teaching programming skills to students studying humanities and social science are essential. Also, it is important to train students studying science and engineering to write their thoughts logically. In order to serve these students, we introduce a pedagogy for computer programming using programming essay. Since a program is a sequence of the operations based on the programmer's logical thinking, programming can be considered as describing programmer's logic in the proper order using programming syntax. In this research, we train students to describe their logic using natural language. Students write down their essays for a given programming problems. Also, we introduce a pedagogy guideline using programming essay.

• Korean Journal of Computational Design and Engineering
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• v.14 no.1
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• pp.50-59
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• 2009

There are two main problems in the current PLC ladder programming practices: First, currently there are no widely adopted systematic design methods to deal with PLC based control systems in the shop floor. So, the control logic design phase is usually omitted in current PLC programming development life cycle. Second, PLC ladder logic provides only microscopic view of system processes. As a result, it is difficult for FA engineers to have overall perspectives about the interaction of system components intuitively during the verification step of logic errors. To solve these problems, this paper proposed object-oriented design and automatic generation method of PLC ladder logic. Based on the proposed method, the computer software to assist the automatic ladder logic generation is also developed.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.5
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• pp.180-187
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• 1996

This paper describes a post-layout simulation method using VHDL and C for verifying the architecture of antifuse-based FPGAs and the dedicated CAD system. An antifuse-based FPGA consists of programming circuitry including decoding logic, logic modules, segmented tracks, antifuses and I/O pads. The VHDL model which includes all these elements is used for logic verification and programming verification of the implemented circuit by reconstructing the logic circuit from the bit-stream generated from layout tool. The implemented circuit comprises of logic modules and routing networks. Since the routing delay of the complex networks is comparable to the delay of the logic module in the FPGA, the accurate post-layout simulation is essential to the FPGA system. In this paper, the C program calculates the delay of the routing netowrks using SPICE, elmore or horowitz delay models and the results feedback to the VHDL simulation. Critical path anc be found from this post-layout simulation results.

• Journal of Korean Philosophical Society
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• v.139
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• pp.1-21
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• 2016

To quickly and accurately grasp the consistency and the true/false of sentence description, we may require the help of a computer. It is thus necessary to research and quickly and accurately grasp the consistency and the true/false of sentence description by computer processing techniques. This requires research and planning for the whole study, namely a plan for the necessary tables and those of processing, and development of the table of the five logic rules. In future research, it will be necessary to create and develop the table of ten basic inference rules and the eleven kinds of derived inference rules, and it will be necessary to build a DB of those tables and the computer processing of sentence logic using server programming JSP and client programming JAVA over its foundation. In this paper we present the overall research plan in referring to the logic operation table, dividing the logic and inference rules, and preparing the listed process sequentially by dividing the combination of their use. These jobs are shown as a variable table and a symbol table, and in subsequent studies, will input a processing table and will perform the utilization of server programming JSP, client programming JAVA in the construction of subject/predicate part activated DB, and will prove the true/false of a sentence. In considering the table prepared in chapter 2 as a guide, chapter 3 shows the creation and development of the table of the five logic rules, i.e, The Rule of Double Negation, De Morgan's Rule, The Commutative Rule, The Associative Rule, and The Distributive Rule. These five logic rules are used in Propositional Calculus, Sentential Logic Calculus, and Statement Logic Calculus for sentence logic.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.183-187
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• 2003

In this paper, we describe an implementation method of "set constraints logic language" using the logic language Prolog. "Set constraints logic language" is a programming language with a new paradigm that uses the "set theory" in programming. In this paper, we explain "set constraints problem solver" that has been proposed by A. Dovier and his researchers and we describe an implementation method of this solver using Prolog. We ran easily implement the "set constraints problem solver" in Prolog, since Prolog easily implements nondeterministic problems and provides a data structure railed list. We have applied the language to several application fields to show the usefulness of the language.

• Journal of the Korean Institute of Intelligent Systems
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• v.14 no.2
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• pp.207-215
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• 2004

The PLC programming by IEC1131-3 is hard to handle to ordinary users as well as professionals. Also it has not a generality, so that it couldn't be debugging some logic errors easily. In order to be adapted for such environment, In this paper, I have developed the ISPLC(Intelligent Agent System based Software Programmable Logic Controller). In ISPLC system, LD programmed by a user is converted to the C code which can be used in a commercial editor such as Visual C++. The detection of logical errors in C code is more effective than PLC programming itself. ISPLC provides the GUI-based interface in web environment and an easy programming platform to such beginners as well as professionals. The study of code conversion of LD to IL as well as IL to C is firstly tried in the world as well as KOREA. To show the effectiveness of the developed system, I applied it to a practical case, a real time traffic control system. ISPLC is minimized the error debugging and programming time owing to be supported by windows application programs.