• ETRI Journal
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• v.45 no.1
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• pp.163-170
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• 2023

We report an electroabsorption modulator (EAM)-integrated distributed Bragg reflector laser diode (DBR-LD) capable of supporting a high data rate and a wide wavelength tuning. The DBR-LD contains two tuning elements, plasma and heater tunings, both of which are implemented in the DBR section, which have blue-shift and red-shift in the Bragg wavelength through a current injection, respectively. The light created from the DBR-LD is intensity-modulated through the EAM voltage, which is integrated monolithically with the DBRLD using a butt-joint coupling method. The fabricated chip shows a threshold current of approximately 8 mA, tuning range of greater than 30 nm, and static extinction ratio of higher than 20 dB while maintaining a side mode suppression ratio of greater than 40 dB under a window of 1550 nm. To evaluate its modulation properties, the chip was bonded onto a mount including a radiofrequency line and a load resistor showing clear eye openings at data rates of 25 Gb/s nonreturn-to-zero and 50 Gb/s pulse amplitude modulation 4-level, respectively.

• The Transactions of the Korean Institute of Power Electronics
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• v.14 no.2
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• pp.120-127
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• 2009

This paper proposes a new Pulse Frequency Modulation(PFM)-Series Boost Capacitor(SBC) full bridge DC/DC Converter which features a high efficiency and high power density. The proposed converter controls the output voltage by varying the voltage across the series boost capacitor according to switching frequency and has no freewheeling period due to 50% fixed duty operation. As a result, its conduction loss is lower than that of the conventional phase shift full bridge converter. Moreover, ZVS of all power switches can be ensured along wide load ranges and output current ripple is very small. Therefore, it has very desirable merits such as a small output inductor, high efficiency, and improved heat generation. This paper performs a rationale and PSIM simulation of the proposed converter. Finally, experimental results from a 1.2kW(12V, 100A) prototype are presented to confirm the operation, validity and features of the proposed converter.

• Journal of Power Electronics
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• v.17 no.1
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• pp.222-231
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• 2017

In this paper, a new architecture for a cost-effective power conditioning systems (PCS) using a single-sourced asymmetric cascaded H-bridge multilevel inverter (MLI) for photovoltaic (PV) applications is proposed. The asymmetric MLI topology has a reduced number of parts compared to the symmetrical type for the same number of voltage level. However, the modulation index threshold related to the drop in the number of levels of the inverter output is higher than that of the symmetrical MLI. This problem results in a modulation index limitation which is relatively higher than that of the symmetrical MLI. Hence, an extra voltage pre-regulator becomes a necessary component in the PCS under a wide operating bias variation. In addition to pre-stage voltage regulation for the constant MLI dc-links, another auxiliary pre-regulator should provide isolation and voltage balance among the multiple H-bridge cells in the asymmetrical MLI as well as the symmetrical ones. The proposed PCS uses a single-ended DC-DC converter topology with a coupled inductor and charge-pump circuit to satisfy all of the aforementioned requirements. Since the proposed integrated-type voltage pre-regulator circuit uses only a single MOSFET switch and a single magnetic component, the size and cost of the PCS is an optimal trade-off. In addition, the voltage balance between the separate H-bridge cells is automatically maintained by the number of turns in the coupled inductor transformer regardless of the duty cycle, which eliminates the need for an extra voltage regulator for the auxiliary H-bridge in MLIs. The voltage balance is also maintained under the discontinuous conduction mode (DCM). Thus, the PCS is also operational during light load conditions. The proposed architecture can apply the module-integrated converter (MIC) concept to perform distributed MPPT. The proposed architecture is analyzed and verified for a 7-level asymmetric MLI, using simulation results and a hardware implementation.

• Journal of the Korean Society of Radiology
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• v.4 no.3
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• pp.31-37
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• 2010

In this paper, a photovoltaic system is designed with PWM(Pulse Width Modulation) voltage source inverter. Proposed synchronous signal and control signal was processed by 56F8323 microprocessor for stable modulation. The PWM voltage source inverter using inverter consists of complex type of electric power converter to compensate for the defect, that is solar cell cannot be developed continuously by connecting with the source of electric power for ordinary use. It can cause the effect of saving electric power, from 10 to 20[%]. The PWM voltage source inverter operates in situation that its output voltage is in same phase with the utility voltage. In addition, I connected extra power to the system through operation the system voltage and inverter power in a synchronized way by extracting the system voltage so that the phase of the system and PWM voltage inverter can be synchronized. In the system of this research showed good results after being controlled in order to provide stable power to the load and the system through maintaining and low output power of harmonics.

• Journal of IKEEE
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• v.24 no.1
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• pp.170-177
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• 2020

This paper presents an open-fault tolerance control method for active neutral point clamped (ANPC) inverter with high frequency/low frequency (HF/LF) modulation. By applying the ANPC inverter with SiC MOSFETs and Si IGBTs, the system efficiency and performance can be improved compared to a Si-based inverter. HF/LF modulation is used for a megawatt-scale inverter to minimize the commutation loop. The open-switch failure in megawatt-scale inverter causes severe damage to load and huge expenses when the inverter has been shut-down. The proposed tolerance control of open-switch failure provides continuous operation and improved reliability to the ANPC inverter. The effectiveness of the proposed fault tolerance control is verified by simulation results.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.3
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• pp.44-53
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• 2008

In this paper, we present the design of delta-sigma modulation-based class-D amplifier for driving headphones in portable audio applications. The presented class-D amplifier generates PWM(pulse width modulation) signals using a single-bit fourth-order high-performance delta-sigma modulator. To achieve a high SNR(signal-to-noise ratio) and ensure system stability, the locations of the modulator loop filter poles and zeros are optimized and thoroughly simulated. The test chip is fabricated using a standard $0.18{\mu}m$ CMOS process. The active area of the chip is $1.6mm^2$. It operates for the signal bandwidth from 20Hz to 20kHz. The measured THD+N(total harmonic distortion plus noise) at the $32{\Omega}$ load terminal is less than 0.03% from a 3V power supply.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.5
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• pp.438-445
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• 2001

This paper presents a high frequency modulation electronic ballast for the metal halide lamp. As the proposed ballast operates in high frequency ranges and can start up the lamp using the LC resonant circuit without external igniter, the proposed ballast is very compact and has a good efficiency in comparison with the conventional low frequency electronic ballast. The proposed ballast is controlled with the modulated frequency in the range of 20kHz to 100kHz in order to avoid the acoustic resonance phenomenon. In this paper, a new realtime acoustic resonance detection method is proposed to evaluate the characteristics of the ballast. The no load protection algorithm and power control algorithm through the detection of the DC link current are described. Finally, the experimental results on the proto-type ballast of 150w metal halide lamp with the proposed methods are discussed.

• Journal of Electrical Engineering and Technology
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• v.10 no.4
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• pp.1540-1551
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• 2015

The detection of position and speed in BLDC motors without using position sensors has meant many efforts for the last decades. The aim of this paper is to develop a sensorless technique for detecting the position and speed of BLDC motors, and to overcome the drawbacks of position sensor-based methods by improving the performance of traditional approaches oriented to motor phase voltage sensing. The position and speed information is obtained by computing the derivative of the terminal phase voltages regarding to a virtual neutral point. For starting-up the motor and implementing the algorithms of the detection technique, a FPGA board with a real-time processor is used. Also, a versatile hardware has been developed for driving BLDC motors through pulse width modulation (PWM) signals. Delta and wye winding motors have been considered for evaluating the performance of the designed hardware and software, and tests with and without load are performed. Experimental results for validating the detection technique were attained in the range 5-1500 rpm and 5-150 rpm under no-load and full-load conditions, respectively. Specifically, speed and position square errors lower than 3 rpm and between 10º-30º were obtained without load. In addition, the speed and position errors after full-load tests were around 1 rpm and between 10º-15º, respectively. These results provide the evidence that the developed technique allows to detect the position and speed of BLDC motors with low accuracy errors at starting-up and over a wide speed range, and reduce the influence of noise in position sensing, which suggest that it can be satisfactorily used as a reliable alternative to position sensors in precision applications.

• Journal of Power Electronics
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• v.15 no.3
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• pp.730-740
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• 2015

This paper presents model reference adaptive system speed estimators based on Type-1 and Type-2 fuzzy logic controllers for the speed sensorless direct torque and flux control of an induction motor drive (IMD) using space vector pulse width modulation. A Type-1 fuzzy logic controller (T1FLC) based adaptation mechanism scheme is initially presented to achieve high performance sensorless drive in both transient as well as in steady-state conditions. However, the Type-1 fuzzy sets are certain and cannot work effectively when a higher degree of uncertainties occurs in the system, which can be caused by sudden changes in speed or different load disturbances and, process noise. Therefore, a new Type-2 FLC (T2FLC) - based adaptation mechanism scheme is proposed to better handle the higher degree of uncertainties, improve the performance, and is also robust to different load torque and sudden changes in speed conditions. The detailed performance of different adaptation mechanism schemes are performed in a MATLAB/Simulink environment with a speed sensor and sensorless modes of operation when an IMD is operates under different operating conditions, such as no-load, load, and sudden changes in speed. To validate the different control approaches, the system is also implemented on a real-time system, and adequate results are reported for its validation.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.15 no.6
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• pp.65-72
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• 2001

This paper deals with a novel full digital control of the single-phase PWM(Pulse Width Modulation) inviter for UPS(Uninterruptible Power Supp1y). The voltage and current of output filter capacitor as a state variable are the feedback control input. In the proposed scheme a double deadbeat control consisting of minor current control loop and major voltage control loop have been developed In addition, a second order deadbeat currents control which should be exactly equal to its reference in two sampling time without error and overshoot is proposed to remove the influence of the calculation time delay. The load current prediction is achieved to compensate the load disturbance. The simulation and experimental result shows that the proposed system offers an output voltage with THD(Total Harmonic Distortion) less than 5% at a full nonlinear load.