• Title/Summary/Keyword: Literal Function

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A Study on the Automatic Accumulation of Literal Data for Reinforced Concrete Design (철근콘크리트 설계에 이용되는 문헌자료의 자동축적에 관한 연구)

  • 이민호;이정재;김한중
    • Proceedings of the Korean Society of Agricultural Engineers Conference
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    • 1998.10a
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    • pp.150-154
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    • 1998
  • Database schema is designed to accumulate the literal information automatically such as reinforced concrete design specifications. Sentence of design knowledge with literal data, numerical data, and symbols have analyzed manually. Finally, the proposed method has been shown that by proper design of the database schema of knowledge information as a function of design rule.

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A New Function Embedding Method for the Multiple-Controlled Unitary Gate based on Literal Switch (리터럴 스위치에 의한 다중제어 유니터리 게이트의 새로운 함수 임베딩 방법)

  • Park, Dong-Young
    • The Journal of the Korea institute of electronic communication sciences
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    • v.12 no.1
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    • pp.101-108
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    • 2017
  • As the quantum gate matrix is a $r^{n+1}{\times}r^{n+1}$ dimension when the radix is r, the number of control state vectors is n, and the number of target state vectors is one, the matrix dimension with increasing n is exponentially increasing. If the number of control state vectors is $2^n$, then the number of $2^n-1$ unit matrix operations preserves the output from the input, and only one can be performed the unitary operation to the target state vector. Therefore, this paper proposes a new method of function embedding that can replace $2^n-1$ times of unit matrix operations with deterministic contribution to matrix dimension by arithmetic power switch of the unitary gate. The proposed function embedding method uses a binary literal switch with a multivalued threshold, so that a general purpose hybrid MCU gate can be realized in a $r{\times}r$ unitary matrix.

A Study on the Construction of Multiple-Valued Logic Functions by Edge-Valued Decision Diagram (에지값 결정도(決定圖)에 의한 다치논리함수구성(多値論理函數構成)에 관한 연구(硏究))

  • Han, Sung-Il;Choi, Jai-Sock;Park, Chun-Myoung;Kim, Heung-Soo
    • Journal of IKEEE
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    • v.1 no.1 s.1
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    • pp.111-119
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    • 1997
  • This paper presented a method of extracting algorithm for Edge Multiple-Valued Decision Diagrams(EMVDD), a new data structure, from Binary Decision Diagram(BDD) which is resently used in constructing the digital logic systems based on the graph theory. And we discussed the function minimization method of the n-variables multiple-valued functions. The proposed method has the visible, schematical and regular properties.

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Courseware for Factorization of Logic Expressions (논리식 인수분해를 위한 코스웨어)

  • Kwon, Oh-Hyeong
    • The Journal of Korean Association of Computer Education
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    • v.15 no.1
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    • pp.65-72
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    • 2012
  • Generally, a logic function has many factored forms. The problem of finding more compact factored form is one of the basic operations in logic synthesis. In this paper, we present a new method for factoring Boolean functions to assist in educational logic designs. Our method for factorization is to implement two-cube Boolean division with supports of an expression. The number of literals in a factored form is a good estimate of the complexity of a logic function. Our empirical evaluation shows the improvements in literal counts over previous other factorization methods.

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A Study on the AND-EXOR Minimum Expressions and their Properties Using Representative Functions of Four Variable NP-Equivalence Classes (4변수 NP 동치류 대표함수를 이용한 AND-EXOR 최소논리식과 그 성질에 관한 연구)

  • 송홍복;김명기
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.15 no.2
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    • pp.124-136
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    • 1990
  • This paper presents a catalog of AND-EXOR expressions for representative function of four-variable NP-equivalence classes. Minimality is defined as minimizing first the number of product terms and then the total number of literal in the expression. Also, the propoerties of minimum expressions are discussed. Using this as a base, We compare minimum expressions of AND-OR type two-variable circuit with minimum expressions of AND-EXOR type two-variable circuit which used algorithm in this paper. As a results it was found that in the case of AND-OR type minimum expressions, number of product terms is under 8, and in the case of AND-EXOR type minimum expressions all functions are formed in which number of product terms is under 6, and generally number of product term is considerably small to realize four-vaiable function toward ADN-EXOR type minimum expression circuit. Algorithm suggested in this paper are realized on Sun 3/50, and through this, logic function under four-variable can get minimum immedately by a catalog suggested in this paper. As for five-variale function, we can do shanon-development a part of the function with suitable variable, and by applying four-variable minimum of this paper on this, it can be possible to get minimum in a short time and it can be said that it is possible to apply this method to functions over 6 variable.

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A Study on the Constructing the Function using Extension Edge Valued Graph (모서리값 확장 그래프를 사용한 함수구성에 관한연구)

  • Park, Chun-Myoung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.4
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    • pp.863-868
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    • 2013
  • In recently years, many digital logic systems based on graph theory are analyzed and synthesized. This paper presented a method of constructing the function using edge valued extension graph which is based on graph theory. The graph is applied to a new data structure. from binary graph which is recently used in constructing the digital logic systems based on the graph theory. We discuss the mathematical background of literal and reed-muller expansion, and we discuss the edge valued extension graph which is the key of this paper. Also, we propose the algorithms which is the function derivation based on the proposed edge valued extension graph. That is the function minimization method of the n-variables m-valued functions and showed that the algorithm had the regularity with module by which the same blocks were made concerning about the schematic property of the proposed algorithm.

Boolean Factorization Technique Using Two-cube Terms (2개의 곱항에서 공통인수를 이용한 논리 분해식 산출)

  • Kwon, Oh-Hyeong
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.849-852
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    • 2005
  • A factorization is an extremely important part of multi-level logic synthesis. The number of literals in a factored from is a good estimate of the complexity of a logic function, and can be translated directly into the number of transistors required for implementation. Factored forms are described as either algebraic or Boolean, according to the trade-off between run-time and optimization. A Boolean factored form contains fewer number of literals than an algebraic factored form. In this paper, we present a new method for a Boolean factorization. The key idea is to identify two-cube Boolean subexpression pairs from given expression. Experimental results on various benchmark circuits show the improvements in literal counts over the algebraic factorization based on Brayton's co-kernel cube matrix.

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Boolean Factorization (부울 분해식 산출 방법)

  • Kwon, Oh-Hyeong
    • Journal of the Korean Society of Industry Convergence
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    • v.3 no.1
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    • pp.17-27
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    • 2000
  • A factorization is an extremely important part of multi-level logic synthesis. The number of literals in a factored form is a good estimate of the complexity of a logic function. and can be translated directly into the number of transistors required for implementation. Factored forms are described as either algebraic or Boolean, according to the trade-off between run-time and optimization. A Boolean factored form contains fewer number of literals than an algebraic factored form. In this paper, we present a new method for a Boolean factorization. The key idea is to build an extended co-kernel cube matrix using co-kernel/kernel pairs and kernel/kernel pairs together. The extended co-kernel cube matrix makes it possible to yield a Boolean factored form. We also propose a heuristic method for covering of the extended co-kernel cube matrix. Experimental results on various benchmark circuits show the improvements in literal counts over the algebraic factorization based on Brayton's co-kernel cube matrix.

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On Some Teaching Problems Related to the Learning of Variable Concept in School Mathematics (학교 수학의 변수 개념 학습과 관련된 몇 가지 지도 문제에 대하여)

  • 김남희
    • School Mathematics
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    • v.1 no.1
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    • pp.19-37
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    • 1999
  • In this study, we examined some matters related to the learning of variable concept in school mathematics on the basis of the theoretical foundation from the previous studies(e.g. Davis, 1975; Rosnick, 1981; IK chemann, 1981; Wagner, 1983.) and practices on variable concept teaching by evaluating the current state of that. Matters be discussed are as follows; the use of symbol for place holders in elementary mathematics, the dealing with sets those elements are literals and operations of such sets, the teaching of dummy variable, the construction of literal expressions that contains variables, the labeling indeterminates as a constant, the change in the exact meaning of variable according to the function concept, the teaching of a generalization by means of variables. After considering on these matters that are connected with the teaching-learning of variable concept, we suggested the alternative proposal to the current state of variable concept teaching.

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