• Title/Summary/Keyword: Link Load

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Design of ATM Switch-based on a Priority Control Algorithm (우선순위 알고리즘을 적용한 상호연결 망 구조의 ATM 스위치 설계)

  • Cho Tae-Kyung;Cho Dong-Uook;Park Byoung-Soo
    • The Journal of the Korea Contents Association
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    • v.4 no.4
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    • pp.189-196
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    • 2004
  • Most of the recent researches for ATM switches have been based on multistage interconnection network known as regularity and self-routing property. These networks can switch packets simultaneously and in parallel. However, they are blocking networks in the sense that packet is capable of collision with each other Mainly Banyan network have been used for structure. There are several ways to reduce the blocking or to increase the throughput of banyan-type switches: increasing the internal link speeds, placing buffers in each switching node, using multiple path, distributing the load evenly in front of the banyan network and so on. Therefore, this paper proposes the use of recirculating shuffle-exchange network to reduce the blocking and to improve hardware complexity. This structures are recirculating shuffle-exchange network as simplified in hardware complexity and Rank network with tree structure which send only a packet with highest priority to the next network, and recirculate the others to the previous network. after it decides priority number on the Packets transferred to the same destination, The transferred Packets into banyan network use the function of self routing through decomposition and composition algorithm and all they arrive at final destinations. To analyze throughput, waiting time and packet loss ratio according to the size of buffer, the probabilities are modeled by a binomial distribution of packet arrival. If it is 50 percentage of load, the size of buffer is more than 15. It means the acceptable packet loss ratio. Therefore, this paper simplify the hardware complexity as use of recirculating shuffle-exchange network instead of bitonic sorter.

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Node Architecture and Cell Routing Strategies for ATM Applications in WDM Multihop Networks (WDM 다중홉 망에서 ATM 응용을 위한 노드 구조 및 셀 라우팅 기법)

  • Lee, Ho-Suk;Lee, Cheong-Hun;So, Won-Ho;Kwon Hyeok-Jung;Kim, Yeong-Cheon
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.35S no.11
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    • pp.44-52
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    • 1998
  • In this paper, we proposed a node architecture and cell routing strategies for ATM applications in WDM multihop networks. The proposed node architecture employs the optical delay loop for storing the cell which is failed in out-link contention. This optical delay loop allows the delay of one cell without the electro-optic conversion. Therefore, we can get the advantages of S&F(Store-and-Forward) routing in Deflection-based all-optical networks. To support the ATM applications efficiently. we considered the transmission priority of ATM cell so that high priority cell can be transmitted with lower loss and shorter delay than low priority one. Two kinds of routing strategies are designed for this architecture: Scheme-Ⅰand Scheme-Ⅱ. Scheme-Ⅰapplies S&F routing to high cell and Deflection routing to low cell, i.e., high cells are routed along the shortest path based on S&F routing, but low cells are deflected or lost. Schem-Ⅱ is similar to Scheme-Ⅰexcept that low cells can occupy the optical loop if it is available. This Scheme-Ⅱ increases the utilization of network resources without decreasing the throughput of high cell by reducing the low cell loss rate when traffic load is low. Simulation results show that our routing strategies have better performance than conventional ones under non-uniform traffic as well as uniform traffic.

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Parallel Distributed Implementation of GHT on Ethernet Multicluster (이더넷 다중 클러스터에서 GHT의 병렬 분산 구현)

  • Kim, Yeong-Soo;Kim, Myung-Ho;Choi, Heung-Moon
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.46 no.3
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    • pp.96-106
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    • 2009
  • Extending the scale of the distributed processing in a single Ethernet cluster is physically restricted by maximum ports per switch. This paper presents an implementation of MPI-based multicluster consisting of multiple Ethernet switches for extending the scale of distributed processing, and a asymptotical analysis for communication overhead through execution-time analysis model. To determine an optimum task partitioning, we analyzed the processing time for various partitioning schemes, and AAP(accumulator array partitioning) scheme was finally chosen to minimize the overall communication overhead. The scope of data partitioned in AAP was modified to fit for incremented nodes, and suitable load balancing algorithm was implemented. We tried to alleviate the communication overhead through exploiting the pipelined broadcast and flat-tree based result gathering, and overlapping of the communication and the computation time. We used the linear pipeline broadcast to reduce the communication overhead in intercluster which is interconnected by a single link. Experimental results shows nearly linear speedup by the proposed parallel distributed GHT implemented on MPI-based Ethernet multicluster with four 100Mbps Ethernet switches and up to 128 nodes of Pentium PC.

A Centralized QoS Routing Architecture with No Dynamic Network State Information Exchange Overhead (동적 네트워크 상태정보 교환 오버헤드를 제거한 중앙 집중적 QoS 라우팅 구조)

  • Kim, Sung-Ha;Lee, Mee-Jeong
    • Journal of KIISE:Information Networking
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    • v.29 no.5
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    • pp.573-582
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    • 2002
  • We propose centralized server based QoS routing schemes, where a route server is responsible for determining QoS paths on behalf of all the routers in a routing domain. In the proposed server based schemes, the dynamic link QoS state information, which is required for a QoS path computation, is implicitly maintained at route server as it assigns or gets back QoS paths. By maintaining the network state information this way, we may not only eliminate the overhead to exchange network state update message but also achieve higher routing performance by utilizing accurate network state information in path computation. We discuss path caching techniques for reducing the amount of path computation overhead at the route server, and evaluate the performance of the proposed schemes using simulation. The simulation results show that the path caching schemes may significantly reduce the route server load. The proposed schemes are also compared to the distributed QoS routing schemes proposed in the literature. It has been shown that the proposed server based schemes not only enhance the routing performance, but they are also competitive with respect to routing overheads.

Residual Battery Capacity and Signal Strength Based Power-aware Routing Protocol in MANET (MANET에서 배터리 잔량과 신호세기를 동시에 고려한 Power-aware 라우팅 프로토콜)

  • Park Gun-Woo;Choi Jong-Oh;Kim Hyoung-Jin;Song Joo-Seok
    • The KIPS Transactions:PartC
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    • v.13C no.2 s.105
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    • pp.219-226
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    • 2006
  • The shortest path is only maintained during short time because network topology changes very frequently and each mobile nodes communicate each other by depending on battery in MANET(Mobile Ad-hoc Network). So many researches that are to overcome a limitation or consider a power have executed actively by many researcher. But these protocols are considered only one side of link stability or power consumption so we can make high of stability but power consumption isn't efficient. And also we can reduce power consumption of network but the protocol can't make power consumption of balancing. For that reason we suggest RBSSPR(Residual Battery Capacity and Signal Strength Based Power-aware Routing Protocol in MANET). The RBSSPR considers residual capacity of battery and signal strength so it keeps not only a load balancing but also minimizing of power consumption. The RBSSPR is based on AODV(Ad-hoc On-demand Distance Vector Routing). We use ns-2 for simulation. This simulation result shows that RBSSPR can extense lifetime of network through distribution of traffic that is centralized into special node and reducing of power consumption.

TCP Engine Design for TCP/IP Hardware Accelerator (TCP/IP Hardware Accelerator를 위한 TCP Engine 설계)

  • 이보미;정여진;임혜숙
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.5B
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    • pp.465-475
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    • 2004
  • Transport Control Protocol (TCP) has been implemented in software running on CPU in end systems, and the protocol processing has appeared as a new bottleneck due to advanced link technology. TCP processing is a critical issue in Storage Area Network (SAN) such as iSCSL, and the overall performance of the Storage Area Network heavily depends on speed of TCP processing. TCP Engine implemented in hardware reduces the load of CPU in end systems as well as accelerates the protocol processing, and hence high speed data processing is achieved. In this paper, we have proposed a hardware engine for TCP processing. TCP engine consists of three major block, TCP Connection block Rx TCP block and Tx TCP block TCP Connection block is responsible for managing TCP connection states. Rx TCP block is responsible for receive flow which receives packets from network and sends to CPU. Rx TCP performs header and data processing and sends header information to TCP connection block and Tx TCP block It also assembles out-of-ordered data to in-ordered before it transfers data to CPU. Tx TCP block is responsible for transmit flow which transfers data from CPU to network. Tx TCP performs retransmission for reliable data transfer and management of transmit window and sequence number. Various test-cases are used to verify the TCP functions. The TCP Engine is synthesized using 0.18 micron technology and results in 51K gates not including buffers for temporal data storage.

Implementation of the BLDC Motor Drive System using PFC converter and DTC (PFC 컨버터와 DTC를 이용한 BLDC 모터의 구동 시스템 구현)

  • Yang, Oh
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.44 no.5
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    • pp.62-70
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    • 2007
  • In this paper, the boost Power Factor Correction(PFC) technique for Direct Torque Control(DTC) of brushless DC motor drive in the constant torque region is implemented on a TMS320F2812DSP. Unlike conventional six-step PWM current control, by properly selecting the inverter voltage space vectors of the two-phase conduction mode from a simple look-up table at a predefined sampling time, the desired quasi-square wave current is obtained, therefore a much faster torque response is achieved compared to conventional current control. Furthermore, to eliminate the low-frequency torque oscillations caused by the non-ideal trapezoidal shape of the actual back-EMF waveform of the BLDC motor, a pre-stored back-EMF versus position look-up table is designed. The duty cycle of the boost converter is determined by a control algorithm based on the input voltage, output voltage which is the dc-link of the BLDC motor drive, and inductor current using average current control method with input voltage feed-forward compensation during each sampling period of the drive system. With the emergence of high-speed digital signal processors(DSPs), both PFC and simple DTC algorithms can be executed during a single sampling period of the BLDC motor drive. In the proposed method, since no PWM algorithm is required for DTC or BLDC motor drive, only one PWM output for the boost converter with 80 kHz switching frequency is used in a TMS320F2812 DSP. The validity and effectiveness of the proposed DTC of BLDC motor drive scheme with PFC are verified through the experimental results. The test results verify that the proposed PFC for DTC of BLDC motor drive improves power factor considerably from 0.77 to as close as 0.9997 with and without load conditions.

Numerical Experiments of Dynamic Wave Pressure Acting on the Immersed Tunnel on Seabed Foundation (해저지반 상부에 설치된 침매터널에 작용하는 동수압에 관한 수치실험)

  • Hur Dong Soo;Kim Chang Hoon;Yeom Gyeong Seon;Kim Do Sam
    • Journal of Korean Society of Coastal and Ocean Engineers
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    • v.17 no.4
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    • pp.294-306
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    • 2005
  • Most immersed tunnels investigated have been investigated based on the engineer's experience with design and construction. From engineering point of view, it is very important to understand the wave interaction with the seabed and immersed tunnel, since the stability of an immersed tunnel depends largely on the behavior of the seabed foundation. In this study, for the first stage research to find out the mechanism of the wave interaction with the seabed and immersed tunnel, the benchmarking method called as direct numerical simulation (DNS) was employed to analyze comprehensively the wave-induced pore water pressures, vorticity and flows in seabed or inside rubble stone around the immersed tunnel. The immersed tunnel is modeled based on Busan-Geoje fixed link project in Korea, which is now on the stage of planning. Moreover, the nonlinear water wave interaction with an immersed tunnel/its seabed foundation was thoroughly examined with regard to the stabilities of the immersed tunnel subjected to various water wave conditions, median grain size and so forth.

A Priority Based Multipath Routing Mechanism in the Tactical Backbone Network (전술 백본망에서 우선순위를 고려한 다중 경로 라우팅 방안)

  • Kim, Yongsin;Shin, Sang-heon;Kim, Younghan
    • Journal of KIISE
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    • v.42 no.8
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    • pp.1057-1064
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    • 2015
  • The tactical network is system based on wireless networking technologies that ties together surveillance reconnaissance systems, precision strike systems and command and control systems. Several alternative paths exist in the network because it is connected as a grid to improve its survivability. In addition, the network topology changes frequently as forces and combatants change their network access points while conducting operations. However, most Internet routing standards have been designed for use in stable backbone networks. Therefore, tactical networks may exhibit a deterioration in performance when these standards are implemented. In this paper, we propose Priority based Multi-Path routing with Local Optimization(PMPLO) for a tactical backbone network. The PMPLO separately manages the global and local metrics. The global metric propagates to other routers through the use of a routing protocol, and it is used for a multi-path configuration that is guaranteed to be loop free. The local metric reflects the link utilization that is used to find an alternate path when congestion occurs, and it is managed internally only within each router. It also produces traffic that has a high priority privilege when choosing the optimal path. Finally, we conducted a simulation to verify that the PMPLO can effectively distribute the user traffic among available routers.

Study on the Air Insulation Design Guideline for ±500 kV Double Bipole Transmission Line with Metallic Return Conductor (도체귀로형 ±500 kV Double Bipole 송전선로 공기절연에 관한 연구)

  • Shin, Kooyong;Kwon, Gumin;Song, Seongwhan;Woo, Jungwook
    • KEPCO Journal on Electric Power and Energy
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    • v.5 no.3
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    • pp.141-147
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    • 2019
  • Recently, the biggest issue in the electricity industry is the increase in renewable energy, and various technologies are being developed to ensure the capacity of the power system. In addition, super-grids linking power systems are being pushed to utilize eco-friendly energy between countries and regions worldwide. The HVDC transmission technology is required to link the power network between regions with different characteristics of the power system such as frequency and voltage. Until now, Korea has applied HVDC transmission technology that connects mainland and Jeju Island with submarine cables. But, the HVDC transmission technology is still developing for long-distance high-capacity power transmission from power parks on the east coast to load-tight areas near the metropolitan area. Considering the high population density and mountainous domestic environment, it is pushing for commercialization of the design technology of the ${\pm}500kV$ Double Bipole with metallic return wire transmission line to transmit large-scale power of 8 GW using minimal right of ways. In this paper, the insulation characteristics were studied for the design of double-bipole transmission tower with metallic return wire, which is the first time in the world. And the air insulation characteristics resistant to the various overvoltage phenomena occurring on transmission lines were verified through a full-scale impulse voltage test.