• 한국항행학회논문지
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• 제27권6호
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• pp.849-854
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• 2023

본 논문은 LDMOS(laterally diffused metal oxide semiconductor)를 이용하여 동작점 Class J를 적용하고, 2차 하모닉 임피던스가 리액턴스 임피던스가 되도록 출력 정합회로를 최적화하여 고효율 전력증폭기를 설계 하였다. 설계한 전력증폭기는 주파수가 108 ~ 110 MHz에서, 전력부가효율(PAE; power added efficiency)은 P_SAT 출력(54.5 dBm)에서 71.5%, P_1dB 출력(51.5 dBm)에서 55.5%, 그리고 45 dBm에서 24.38%의 특성을 보였다. 공간변조 방식에서의 기준 신호인 CSB(carrier with sideband) 전력증폭기는 운용 출력이 45 dBm ~ 35 dBm이며, 그 출력에서 선형적인 SDM(sum in the depth of modulation) 특성(40% ± 0.3%)을 얻었다. 전력증폭기의 바이어스 동작점에 따른 진폭 변조도 특성를 측정하고, 선형적인 변조도 특성을 얻을 수 있는 최적의 동작점을 제안한다.

• 전기전자학회논문지
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• 제23권2호
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• pp.454-460
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• 2019

In this paper, a watt-level 2.4-GHz RFCMOS linear power amplifier (PA) with pre-distortion method using variable capacitance with respect to input power is demonstrated. The proposed structure is composed of a power detector and a MOS capacitor to improve the linearity of the PA. The pre-distortion based linearizer is embedded in the two-stage PA to compensate for the gain compression in the amplifier stages, it also improves the output P1dB by approximately 1 dB. The simulation results demonstrate a 1-dB gain compression power of 30.81 dBm at 2.4-GHz, and PAE is 29.24 % at the output P1dB point.

• ETRI Journal
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• 제32권1호
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• pp.151-153
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• 2010

A highly efficient linear and compactly integrated series-type Doherty power amplifier (PA) has been developed for wideband code-division multiple access handset applications. To overcome the size limit of a typical Doherty amplifier, all circuit elements, such as matching circuits and impedance transformers, are fully integrated into a single monolithic microwave integrated circuit (MMIC). The implemented PA shows a very low idle current of 25 mA and an excellent power-added efficiency of 25.1% at an output power of 19 dBm by using an extended Doherty concept. Accordingly, its average current consumption was reduced by 51% and 41% in urban and suburban environments, respectively, when compared with a class-AB PA. By adding a simple predistorter to the PA, the PA showed an adjacent channel leakage ratio better than -42 dBc over the whole output power range.

• 한국정보통신학회논문지
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• 제23권7호
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• pp.807-815
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• 2019

본 논문에서는 RF CMOS 180-nm 공정을 이용하여 무선 통신 기기에서 quad-band를 지원하기 위한 전력 증폭기를 설계하였다. 제안한 전력증폭기는 low-band인 0.9,1.8,2.4 GHz 와 high-band인 5 GHz 로 구성되어있으며, 각각 입력 정합회로에서는 스위치를 사용하지 않는 구조를 제안하였다. 그리고 최대 선형 전력 확보를 위해 출력 정합회로는 각 주파수 대역에서의 전력 정합지점으로 임피던스 변환을 진행하였다. 제안한 전력증폭기는 무선 통신 변조 신호를 사용하여 검증하였다. Long-term evolution(LTE) 10 MHz 변조 신호를 이용하여 0.9 GHz 및 1.8 GHz 를 측정하였으며, 이때 출력 전력은 각각 23.55 dBm 및 24.23 dBm으로 측정 되었고, 20 MHz 변조 신호를 사용한 경우, 1.8 GHz에서 출력 전력 22.24 dBm 이 측정되었다. Wireless local area network(WLAN) 802.11n 변조 신호를 이용하여 2.4 GHz 및 5.0 GHz 대역을 측정하였으며, 출력 전력은 20.58 dBm 및 17.7 dBm으로 확인되었다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권4호
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• pp.501-505
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• 2015

In this paper, we demonstrated a 4W power amplifier monolithic microwave integrated circuit (MMIC) for Ku-band satellite communication applications. The used device technology relies on $0.25{\mu}m$ GaAs pseudomorphic high electron mobility transistor (PHEMT) process. The 4W power amplifier MMIC has linear gain of over 30 dB and saturated output power of over 36.1 dBm in the frequency range of 13.75 GHz ~ 14.5 GHz. Power added efficiency (PAE) is over 30 %.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2003년도 종합학술발표회 논문집 Vol.13 No.1
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• pp.87-90
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• 2003

In this paper, A feedforward linear power amplifier is analyzed for imperfect signal cancellation and negative feedback for basestaion of IMT2000 band. the distortion generatied by the error amplifier is reduced using an imperfect signal cancellation for a 1-carrier WCDMA source by 4.3dB at 2.5MHz offset and 6dB at 5MHz offset of IMSR(intermodulation signal power ratio) compared to a perfect signal cancellation system. additionally, An imperfect signal cancellation using negative feedback improved 1.3dB and 8.2dB at 2.5MHz and 5MHz offset of IMSR compared to an imperfect signal cancellation.

• 전기학회논문지
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• 제58권5호
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• pp.999-1003
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• 2009

We have designed and fabricated a linear drive amplifier with a novel intermodulation distortion(IMD) canceller using $0.18{\mu}m$ CMOS process. The drive amplifier with IMD canceller is composed of a cascode main amplifier and an additional common-source IMD canceller. Since the IMD canceller generates IM3($3^{rd}$-order imtermodulation) signal with $180^{\circ}$ phase difference against the IM3 of the cascode main amplifier, the IM3 power is drastically eliminated. As of the measurement results, $OP_{1dB}$, $OIP_3$, and power-add efficiency are 5.5 dBm, 15.5 dBm, and 21%, respectively. Those are 5 dB, 6 dB, and 13.5% enhanced values compared to a conventional cascode drive amplifier. The IMD3 of the drive amplifier with IMD canceller is enhanced more than 10 dB compared to that of the conventional cascode drive amplifier for input power ranges from -22 to -14 dBm.

• Journal of electromagnetic engineering and science
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• 제14권4호
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• pp.393-398
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• 2014

A highly efficient dual-mode linear CMOS stacked-FET power amplifier (PA) is implemented for 3G UMTS and 4G LTE handset applications. High efficiency is achieved at a backed-off output power ($P_{out}$) below 12 dBm by employing an active-bypass amplifier, which consumes very low quiescent current and has high load-impedance. The output paths between high- and low-power modes of the PA are effectively isolated by using a bypass switch, thus no RF performance degradation occurs at high-power mode operation. The fabricated 900 MHz CMOS PA using a silicon-on-insulator (SOI) CMOS process operates with an idle current of 5.5 mA and shows power-added efficiency (PAE) of 20.5%/43.5% at $P_{out}$ = 12.4 / 28.2 dBm while maintaining an adjacent channel leakage ratio (ACLR) better than -39 dBc, using the 3GPP uplink W-CDMA signal. The PA also exhibits PAE of 35.1% and $ACLR_{E-UTRA}$ of -33 dBc at $P_{out}$ = 26.5 dBm, using the 20 MHz bandwidth 16-QAM LTE signal.

• 한국컴퓨터산업학회논문지
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• 제6권3호
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• pp.429-436
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• 2005

높은 스펙트럼 효율을 갖는 선형 변조방식은 이동체 통신 시스템에 적용시 문제점이 발생한다. 본 논문에서는 이러한 문제점을 해결하기 위하여 전력 증폭기의 비선형성을 선형화하는 방법에 대하여 고찰하고 설계이론을 바탕으로 고주파 전력 증폭기를 설계 및 제작하였다. 제작된 고주파 전력 증폭기는 마이크로스트림 라인을 사용하였으며 중심주파수 1 GHz에서 13 dBm 입력에 28 dBm의 출력을 얻을 수 있었다.

• ETRI Journal
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• 제36권2호
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• pp.214-223
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• 2014

A fully-integrated penta-band reconfigurable power amplifier (PA) is developed for handset Tx applications. The output structure of the proposed PA is composed of the fixed output matching network, power and frequency reconfigurable networks, and post-PA distribution switches. In this work, a new reconfiguration technique is proposed for a specific band requiring power and frequency reconfiguration simultaneously. The design parameters for the proposed reconfiguration are newly derived and applied to the PA. To reduce the module size, the switches of reconfigurable output networks and post-PA switches are integrated into a single IC using a $0.18{\mu}m$ silicon-on-insulator CMOS process, and a compact size of $5mm{\times}5mm$ is thus achieved. The fabricated W-CDMA PA module shows adjacent channel leakage ratios better than -39 dBc up to the rated linear power and power-added efficiencies of higher than around 38% at the maximum linear output power over all the bands. Efficiency degradation is limited to 2.5% to 3% compared to the single-band reference PA.