• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2017.10a
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• pp.581-583
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• 2017

Elliptic curve cyptography is relatively a current cryptography based on point arithmetic on elliptic curves and the Elliptic Curve Discrete Logarithm Problem (ECDLP). This discrete logarithm problems enables perfect forward secrecy which helps to easily generate key and almost impossible to revert the generation which is a great feature for privacy and protection. In this paper, we provide a lightweight Elliptic Curve Diffie-Hellman (ECDH) Key exchange generator that creates a 163 bit long shared key that can be used in an Elliptic Curve Integrated Encryption Scheme (ECIES) as well as for key agreement. The algorithm uses a fast multiplication algorithm that is small in size and also implements the extended euclidean algorithm. This proposed architecture was designed using verilog HDL, synthesized with the vivado ISE 2016.3 and was implemented on the virtex-7 FPGA board.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.409-411
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• 2015

본 논문은 128/192/256-비트의 마스터키 길이를 지원하는 경량 블록 암호 알고리즘 CLEFIA-128/192/256의 FPGA 설계에 대하여 기술한다. 라운드키 생성을 위한 중간키 생성과 라운드 변환이 단일 데이터 프로세싱 블록으로 처리되도록 설계하였으며, 변형된 GFN(Generalized Feistel Network) 구조와 키 스케줄링 방법을 적용하여 데이터 프로세싱 블록과 키 스케줄링 블록의 회로를 단순화시켰다. Verilog HDL로 설계된 CLEFIA 크립토 프로세서를 FPGA로 구현하여 정상 동작함을 확인하였다. Vertex5 XC5VSX50T FPGA에서 1,563개의 LUT FilpFlop pairs로 구현되었으며, 최대 112 Mhz 81.5/69/60 Mbps의 성능을 갖는 것으로 예측되었다.

• Proceedings of the Korea Information Processing Society Conference
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• 2022.11a
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• pp.222-224
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• 2022

미국 국립표준기술연구소는 사물 인터넷 환경 상에서 원활하게 구동할 수 있는 경량암호의 표준화 공모전을 개최하였다. 경량암호 표준화 공모전은 2019년 Round 1 결과가 발표되었고, 2021년에는 최종 라운드 후보를 발표하였다. 최종 선정된 알고리즘은 총 10종이다. 선정된 알고리즘은 동작 방식에 따라서 순열 기반, 블록암호 기반, 트위커블 블록암호 기반, 그리고 스트림 암호 기반으로 분류된다. 또한 필수적으로 AEAD 기능을 제공할 것을 요구하며, 추가적으로 해시 기능을 제공하기도 한다. 본 논문에서는 국립표준기술연구소에서 진행한 경량암호 표준화 공모전의 최종 라운드에 대해서 확인해본다.

• KIPS Transactions on Computer and Communication Systems
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• v.12 no.6
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• pp.181-188
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• 2023

Block cipher is not expected to be safe for quantum computer, as Grover's algorithm reduces the security strength by accelerating brute-force attacks on symmetric key ciphers. So it is necessary to check the post-quantum security strength by implementing quantum circuit for the target cipher. In this paper, we propose the optimal quantum circuit implementation result designed as a technique to minimize the use of quantum resources (qubits, quantum gates) for SIMECK lightweight cryptography, and explain the operation of each quantum circuit. The implemented SIMECK quantum circuit is used to check the estimation result of quantum resources and calculate the Grover attack cost. Finally, the post-quantum strength of SIMECK lightweight cryptography is evaluated. As a result of post-quantum security strength evaluation, all SIMECK family cipher failed to reach NIST security strength. Therefore, it is expected that the safety of SIMECK cipher is unclear when large-scale quantum computers appear. About this, it is judged that it would be appropriate to increase the block size, the number of rounds, and the key length to increase the security strength.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.30 no.1
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• pp.87-100
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• 2020

Researches on Post-quantum blockchain, which is a synthesis of blockchain and post-quantum cryptography[1], are relatively unrevealed areas but have needs to be studied with the regard to the quantum computers. However there could be several fundamental problems, e.g. unsustainably large size of public key and signature, or too lengthy time for sign and verification, if any post-quantum cryptography is adopted to the existing blockchain to implement post-quantum blockchain. Thus, a new method was proposed in this paper that produces fixed length of references for massive signatures and corresponding public keys to enable relatively lightweight transactions. This paper proposed the mechanism that included a new transaction structure and protocols, and demonstrated a post-quantum blockchain that the proposed mechanism was adopted. Through this research, it could enhance compatibility of blockchain regarding post-quantum digital signature, possibly reducing weights of the whole blockchain.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.6
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• pp.1163-1170
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• 2016

A hardware implementation of ultra-lightweight block cipher algorithm PRESENT which was specified as a standard for lightweight cryptography ISO/IEC 29192-2 is described. The PRESENT crypto-processor supports two key lengths of 80 and 128 bits, as well as four modes of operation including ECB, CBC, OFB, and CTR. The PRESENT crypto-processor has on-the-fly key scheduler with master key register, and it can process consecutive blocks of plaintext/ciphertext without reloading master key. In order to achieve a lightweight implementation, the key scheduler was optimized to share circuits for key lengths of 80 bits and 128 bits. The round block was designed with a data-path of 64 bits, so that one round transformation for encryption/decryption is processed in a clock cycle. The PRESENT crypto-processor was verified using Virtex5 FPGA device. The crypto-processor that was synthesized using a $0.18{\mu}m$ CMOS cell library has 8,100 gate equivalents(GE), and the estimated throughput is about 908 Mbps with a maximum operating clock frequency of 454 MHz.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.7
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• pp.1296-1302
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• 2016

A hardware implementation of ultra-lightweight block cipher algorithm PRESENT that was specified as a block cipher standard for lightweight cryptography ISO/IEC 29192-2 is described in this paper. Two types of crypto-core that support master key size of 80-bit are designed, one is for encryption-only function, and the other is for encryption and decryption functions. The designed PR80 crypto-cores implement the basic cipher mode of operation ECB (electronic code book), and it can process consecutive blocks of plaintext/ciphertext without reloading master key. The PR80 crypto-cores were designed in soft IP with Verilog HDL, and they were verified using Virtex5 FPGA device. The synthesis results using $0.18{\mu}m$ CMOS cell library show that the encryption-only core has 2,990 GE and the encryption/decryption core has 3,687 GE, so they are very suitable for IoT security applications requiring small gate count. The estimated maximum clock frequency is 500 MHz for the encryption-only core and 444 MHz for the encryption/decryption core.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.42 no.2
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• pp.316-322
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• 2017

This paper suggests an efficient software implementation of lightweight encryption algorithm PRESENT which supports for secret key lengths of 80-bits. Each round of PRESENT is composed of the round key addition, substitution, and permutation and is repeated 31 times. Bo Zhu suggested combined substitution and permutation for efficient operation so that encryption throughput has been increased 2.6 times than processing substitution and permutation at separate times. The scheme that suggested in this paper improved the scheme of Bo Zhu to reduce the number of operation for the round key addition, substitution, and permutation. The scheme that suggested in this paper has increased encryption throughput up to 1.6 times than the scheme of Bo Zhu but memory usage has been increased.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.10 no.12
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• pp.5572-5595
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• 2016

Multi-server authentication enables the subscribers to enjoy an assortment of services from various service providers based on a single registration from any registration centre. Previously, a subscriber had to register from each service provider individually to avail respective services relying on single server authentication. In the past, a number of multi-server authentication techniques can be witnessed that employed lightweight and even computationally intensive cryptographic operations. In line with this, Zhu has presented a chaotic map based multi-server authentication scheme recently, which is not only vulnerable to denial-of-service attack, stolen-verifier attack, but also lacks anonymity. This research aims at improving the Zhu's protocol in terms of cost and efficiency. Moreover, the comparative study is presented for the performance of improved model against the existing scheme, and the security of proposed model is formally proved using BAN Logic.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.2
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• pp.269-275
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• 2008

The rapid growth of ubiquitous technology has increased the demand of storage capacity in mobile computing. iSCSI(Internet Small Computer Interface), a virtual storage protocol would be one of the possible solutions to resolve this problem. However, the insecure nature of this protocol makes it vulnerable to malicious attacks. In this paper, we aims to design and propose a new secure lightweight iSCSI-based virtual storage scheme for mobile devices. Suitable security mechanisms are considered in the design of our proposed solution in order to overcome existing security problems in iSCSI. Relevant experiments are tarried out and the results revealed that the efficiency of proposed algorithm in which it introduces over 100% Read/Write performance improvement compared with the IPsec approach.