• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.9
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• pp.146-155
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• 1994

In this paper, we desribe a new system, called BEST, that is used to develop a macromodel or behavioral model easily. It automatically calculates the component values of macromodel represented by equations to satisfy the given specification. Also, it gives the way to analyze both the behavioral model and transistor level circuit, and then compare the analysis results of them to check the correspondence under specific temperature and bias condition, and BEST optimizes the component values of macromodel. Other feature is to characterize MOSFET as switch model which consists of PWL-RC network. Finally, it is possible to generage multi-level netlist which consists of macro/switch/transistor level circuits, and user can determine the trade-off between simulation speed and accuracy. With the graphic user interface form of macromodel development system described above. BEST enable designers to make macromodel by themselves and to uas it. We applied BEST to develop the macromodel for the test circuit and got the 18.6 times simulation speed up with preserving the accuracy within 10% compared to the conventional transistor level circuit simulation. Also, applicability of optimization capability was verified.

• Proceedings of the KIEE Conference
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• 2002.11d
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• pp.177-182
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• 2002

This paper presents the loss analysis of Three Level Converter. Three Level DC/DC Converter presented in this paper used a phase shift control with a flying capacitor in the primary side to achieve ZVS for the outer switch. This converter reduces the voltage stress across the main switch to half of input voltage. This paper analyses the loss of each component and the various losses in the circuit assessed. The result of the analysis are verified using 2.5kW prototype.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.1
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• pp.78-84
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• 2011

In this paper, the switching frequency and THD for the reduction instead of traditional single phase inverter using a new type of central arm of the single phase inverter is proposed. The proposed single phase inverter topology, the existing one to add a arm by two-way central switch 3-level output voltage can be raised and, central arm, especially one or two of the switches by using a switch to the diode current switching algorithm was simplified. During the dead time because of this, depending on the direction of the current level does not appear in any other existing level compared to the inverter output voltage level of the THD has the advantage that less can be. The simulation and experimental results verified the validity of the proposed topology.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.3
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• pp.257-265
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• 2014

This paper proposes a simple compensation method for switches of the unclamped voltage in the three-level NPC inverter. Voltages of inner-switches can be unclamped in the three-level NPC (neutral point clamped) inverter. It can cause the problem of the switch fault accident. By adding a capacitor, switches of the unclamped voltage can be clamped. Through the analysis of the circuit, the reason behind switches being unclamped was verified which leads to the solution method that designs a compensation capacitor. The proposed method was validated through the simulation and experimental results.

• Journal of the Korea Institute of Military Science and Technology
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• v.13 no.4
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• pp.586-593
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• 2010

In this paper, I have proposed that the 1st and 2nd AC-DC transformation methods using multi-level pulsating currents and selection switches. Through making the rectified voltage of the proposed AC-DC translation which is similar to reference voltage by selecting from multi-level pulsating currents, the proposed translation has dramatically reduced the ripple voltage. I have compared the performance of the DC voltage, the ripple voltage and the peak to peak voltage of the proposed method with the conventional method. The simulation results show that the proposed 2nd method has the better performance than the 1st method in the point of average DC voltage drop and peak to peak voltage increase.

• Journal of Power Electronics
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• v.1 no.1
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• pp.36-47
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• 2001

The carrier-based space vector pulse width modulation(SVPWM), which is considered as highly simple and efficient PWM technology, can be also used in multilevel inverters. The method was originally designed for the two-level inverter and developed to the diode clamped multilevel inverter structure. however it may be noted that it also cause bad switch utilization in cascaded multilevel inverter. This paper introduces an improved carrier-based SVPWM scheme, which is fully suitable for cascaded multilevel inverter topologies because it can achieve the optimized switch utilization through the redistribution of the triangular carrier waves considering leg voltage redundancies while having the advantages of the conventional carrier-based SVPWM. Using simulation and experimental results, the superior performance of new PWM method is shown.

• Proceedings of the Korea Information Processing Society Conference
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• 2001.10b
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• pp.1533-1536
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• 2001

This paper considers the TMN system for management of public ATM switching network which has the four-level hierarchical structure consisting of one network management system, a few element management system and several agent-ATM switch pairs, respectively. The effects of one TMN command on the local call processing performance of the component ATM switch an analyzed using Jackson's queueing model. The TMN command considered is the permanent virtual call connection, and the performance measures of ATM switch are the utilization, mean queue length and mean waiting time for the processor interfacing the subscriber lines and trunks directly, and the call setup delay of the ATM switch.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.26 no.10
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• pp.1567-1570
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• 2022

This paper, we presents a RF protection technique of antenna switch by improving the power handling capability in worst case environment mode for mobile phone applications without critical payment of circuit performances such as insertion loss, isolation and ACBV (AC breakdown voltage). By applying a additional capacitive path located in front of the antenna in cell-phone, it performs the effective reduction of input power in high voltage standing wave ratio (VSWR) condition. Under the all-path off condition which causes a high VSWR, it achieved 37.7dBm power handling level as high as 5.7dB compared to that of conventional one at 2GHz. In addition, insertion loss and isolation performances were 0.31dB and 42.72dB at 2 GHz, respectively which were almost similar to that of the conventional circuit. The proposed antenna switch was fabricated in 130nm CMOS SOI technology.

• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.4
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• pp.291-297
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• 2012

Recently, Switching devices become cheaper, depending on the multi-level inverters are considered as the power-conversion systems for high-power and power-quality demanding applications. The multi-level inverters can reduce the THD(Total Harmonic Distortion) as the output which is similar sinusoidal waveform by synthesizing several capacitor DC voltages. However it has some disadvantages such as increased number of components, complex PWM control method. Therefore, this paper is proposed the new multi-level inverter topology using an new H-bridge output stage with a bidirectional auxiliary switch. The proposed topology is the 4-level 3-phase PWM inverter with less switching part than conventional multi-level inverters and reactive power control possible. In order to understand the new multi-level inverter, topology analysis and switching patterns and modes according to the current loop are described in this paper. The proposed multi-level inverter topology is validated through PSIM simulation and the experimental results are provided from a prototype.

• Journal of Power Electronics
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• v.18 no.5
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• pp.1501-1512
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• 2018

This paper proposes a three-phase three-switch buck-type converter as the MSC of a wind turbine system. Owing to a novel switching modulation scheme that can eliminate the unwanted diode rectifier mode switching state, the proposed system exhibits a satisfying ac voltage and current waveform quality and torque ripple up to the level of a typical current source rectifier even under a wide power factor operating range. The proposed system has been verified through simulations and HILS tests on a PMSG wind turbine model of 5MW/4160V. The proposed converter has been shown to provide a stator current THD of 3.9% and a torque ripple of 1% under the rated power condition. In addition to the inherent advantage of the reduced switch count of three-phase three-switch buck-type converters, the proposed switching modulation technique can make this converter a viable solution for the MSC placed inside of a nacelle, which is under severe volume, weight and mechanical vibration design limits.