• Title/Summary/Keyword: Leakage Current Measurement

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Memory Characteristics of Al2O3/La2O3/SiO2 Multi-Layer Structures for Charge Trap Flash Devices (전하 포획 플래시 소자를 위한 Al2O3/La2O3/SiO2 다층 박막 구조의 메모리 특성)

  • Cha, Seung-Yong;Kim, Hyo-June;Choi, Doo-Jin
    • Korean Journal of Materials Research
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    • v.19 no.9
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    • pp.462-467
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    • 2009
  • The Charge Trap Flash (CTF) memory device is a replacement candidate for the NAND Flash device. In this study, Pt/$Al_2O_3/La_2O_3/SiO_2$/Si multilayer structures with lanthanum oxide charge trap layers were fabricated for nonvolatile memory device applications. Aluminum oxide films were used as blocking oxides for low power consumption in program/erase operations and reduced charge transports through blocking oxide layers. The thicknesses of $SiO_2$ were from 30 $\AA$ to 50 $\AA$. From the C-V measurement, the largest memory window of 1.3V was obtained in the 40 $\AA$ tunnel oxide specimen, and the 50 $\AA$ tunnel oxide specimen showed the smallest memory window. In the cycling test for reliability, the 30 $\AA$ tunnel oxide sample showed an abrupt memory window reduction due to a high electric field of 9$\sim$10MV/cm through the tunnel oxide while the other samples showed less than a 10% loss of memory window for $10^4$ cycles of program/erase operation. The I-V measurement data of the capacitor structures indicated leakage current values in the order of $10^{-4}A/cm^2$ at 1V. These values are small enough to be used in nonvolatile memory devices, and the sample with tunnel oxide formed at $850^{\circ}C$ showed superior memory characteristics compared to the sample with $750^{\circ}C$ tunnel oxide due to higher concentration of trap sites at the interface region originating from the rough interface.

A Study on Rekeying and Sponged-based Scheme against Side Channel Attacks (부채널 공격 대응을 위한 Rekeying 기법에 관한 연구)

  • Phuc, Tran Song Dat;Lee, Changhoon
    • Journal of Digital Contents Society
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    • v.19 no.3
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    • pp.579-586
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    • 2018
  • Simple Power Analysis(SPA) and Differential Power Analysis(DPA) attacks are Side Channel Attacks(SCA) which were introduced in 1999 by Kocher et al [2]. SPA corresponds to attacks in which an adversary directly recovers key material from the inspection of a single measurement trace (i.e. power consumption or electromagnetic radiation). DPA is a more sophisticated attacks in which the leakage corresponding to different measurement traces (i.e. different plaintexts encrypted under the same key) is combined. Defenses against SPA and DPA are difficult, since they essentially only reduce the signal the adversary is reading, PA and DPA. This paper presents a study on rekeying and sponged-based approach against SCA with current secure schemes. We also propose a fixed ISAP scheme with more secure encryption and authentication based on secure re-keying and sponge functions.

Study on electrical properties of BST thin film with substrates (기판에 따른 BST 박막의 전기적 특성에 관한 연구)

  • 이태일;최명률;박인철;김홍배
    • Journal of the Korean Vacuum Society
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    • v.11 no.3
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    • pp.135-140
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    • 2002
  • In this paper, We deposited the BST thin-film on p-type (100)Si, (100)MgO and MgO/Si substrates respectively using RF magnetron sputtering method. After the BST thin-fil m was deposited, we performed RTA(rapid thermal anneal) at $600^{\circ}C$, oxygen atmosphere and 1 min. In the XRD measurement, we observed the (110) $Ba_{0.5}Sr_{0.5}TiO_3$ main peak in all samples and the peak intensity increased after post annealing. Then we manufactured a capacitor using Al Electrode and measured I-V, C-V. In C-V measurement result values for each substrate, dielectric constant was calculated 120 (bare Si), 305(MgO/Si), 310(MgO) respectively. A leakage current density was present less than 1 $\mu\textrm{A/cm}^2$ at applied fields below 0.3 MV/cm. In conclusion we confirmed that MgO/Si substrates give good results for BST thin-film deposition.

A Study on Smart Suthentication Process for Non-face-to-face Body heat Detector with Smart Authentication (비대면 스마트 인증 발열 감지기를 위한 스마트 인증 프로세스 연구)

  • Kim, Hyung-O;Hong, ChangHo;Lee, Hyo Jae;Kim, Eung-seok
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2021.05a
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    • pp.244-245
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    • 2021
  • Recently, A fever test is essential in a crowded places over the world because of COVID-19. A fever test is also conducted for visitors through a thermometer or a thermal imaging camera In Korea leading world with K-quarantine. However, the current body heat measurement process is divided into the steps of body heat examination and entry register. Therefore, access control person must be deployed at the entrance. In addition, since the accessor directly measures body heat and records personal information, the reliability of the information is low and the risk of personal information leakage is high. Therefore, in this paper, we consider the non-face-to-face smart authentication fever detector and propose a smart authentication process to unify the process for dualized body heat measurement and access recording.

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Characterization of New Avalanche Photodiode Arrays for Positron Emission Tomography

  • Song, Tae-Yong;Park, Yong;Chung, Yong-Hyun;Jung, Jin-Ho;Jeong, Myung-Hwan;Min, Byung-Jun;Hong, Key-Jo;Choe, Yearn-Seong;Lee, Kyung-Han
    • Proceedings of the Korean Society of Medical Physics Conference
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    • 2003.09a
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    • pp.45-45
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    • 2003
  • The aim of this study was the characterization and performance validation of new prototype avalanche photodiode (APD) arrays for positron emission tomography (PET). Two different APD array prototypes (noted A and B) developed by Radiation Monitoring Device (RMD) have been investigated. Principal characteristics of the two APD array were measured and compared. In order to characterize and evaluate the APD performance, capacitance, doping concentration, quantum efficiency, gain and dark current were measured. The doping concentration that shows the impurity distribution within an APD pixel as a function of depth was derived from the relationship between capacitance and bias voltage. Quantum efficiency was measured using a mercury vapor light source and a monochromator used to select a wavelength within the range of 300 to 700 nm. Quantum efficiency measurements were done at 500 V, for which the APD gain is equal to one. For the gain measurements, a pencil beam with 450 nm in wavelength was illuminating the center of each pixel. The APD dark currents were measured as a function of gain and bias. A linear fitting method was used to determine the value of surface and bulk leakage currents. Mean quantum efficiencies measured at 400 and 450 nm were 0.41 and 0.54, for array A, and 0.50 and 0.65 for array B. Mean gain at a bias voltage of 1700 V, was 617.6 for array A and 515.7 for type B. The values based on linear fitting were 0.08${\pm}$0.02 nA 38.40${\pm}$6.26 nA, 0.08${\pm}$0.0l nA 36.87${\pm}$5.19 nA, and 0.05${\pm}$0.00 nA, 21.80${\pm}$1.30 nA in bulk surface leakage current for array A and B respectively. Results of characterization demonstrate the importance of performance measurement validating the capability of APD array as the detector for PET imaging.

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Electrical Characteristics and Deep Level Traps of 4H-SiC MPS Diodes with Different Barrier Heights (전위 장벽에 따른 4H-SiC MPS 소자의 전기적 특성과 깊은 준위 결함)

  • Byun, Dong-Wook;Lee, Hyung-Jin;Lee, Hee-Jae;Lee, Geon-Hee;Shin, Myeong-Cheol;Koo, Sang-Mo
    • Journal of IKEEE
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    • v.26 no.2
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    • pp.306-312
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    • 2022
  • We investigated electrical properties and deep level traps in 4H-SiC merged PiN Schottky (MPS) diodes with different barrier heights by different PN ratios and metallization annealing temperatures. The barrier heights of MPS diodes were obtained in IV and CV characteristics. The leakage current increased with the lowering barrier height, resulting in 10 times larger current. Additionally, the deep level traps (Z1/2 and RD1/2) were revealed by deep level transient spectroscopy (DLTS) measurement in four MPS diodes. Based on DLTS results, the trap energy levels were found to be shallow level by 22~28% with lower barrier height It could confirm the dependence of the defect level and concentration determined by DLTS on the Schottky barrier height and may lead to incorrect results regarding deep level trap parameters with small barrier heights.

Electrical Properties of Ultra-shallow$p^+-n$ Junctions using $B_{10}H_{14}$ ion Implantation ($B_{10}H_{14}$ 이온 주입을 통한 ultra-shallow $p^+-n$ junction 형성 및 전기적 특성)

  • 송재훈;김지수;임성일;전기영;최덕균;최원국
    • Journal of the Korean Vacuum Society
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    • v.11 no.3
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    • pp.151-158
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    • 2002
  • Fabricated were ultra-shallow $p^+-n$ junctions on n-type Si(100) substrates using decaborane $(B_{10}H_{14})$ ion implantation. Decaborane ions were implanted at the acceleration voltages of 5 kV to 10 kV and at the dosages of $1\times10^{12}\textrm{cm}^2$.The implanted specimens were annealed at $800^{\circ}C$, $900^{\circ}C$ and $1000^{\circ}C$ for 10 s in $N_2$ atmosphere through a rapid thermal process. From the measurement of the implantation-induced damages through $2MeV^4 He^{2+}$ channeling spectra, the implanted specimen at the acceleration voltage of 15 kV showed higher backscattering yield than those of the bare n-type Si wafer and the implanted specimens at 5 kV and 10 kV. From the channeling spectra, the calculated thicknesses of amorphous layers induced by the ioin implantation at the acceleration voltages of 5 kV, 10 kV and 15 kV were 1.9 nm, 2.5 nm and 4.3 nm, respectively. After annealing at $800^{\circ}C$ for 10 s in $N_2$ atmosphere, most implantation-induced damages of the specimens implanted at the acceleration voltage of 10 kV were recovered and they exhibited the same channeling yield as the bare Si wafer. In this case, the calculated thickness of the amorphous layer was 0.98 nm. Hall measurements and sheet resistance measurements showed that the dopant activation increased with implantation energy, ion dosage and annealing temperature. From the current-voltage measurement, it is observed that leakage current density is decreased with the increase of annealing temperature and implantation energy.

Study of the Efficiency Droop Phenomena in GaN based LEDs with Different Substrate

  • Yoo, Yang-Seok;Li, Song-Mei;Kim, Je-Hyung;Gong, Su-Hyun;Na, Jong-Ho;Cho, Yong-Hoon
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.172-173
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    • 2012
  • Currently GaN based LED is known to show high internal or external efficiency at low current range. However, this LED operation occurs at high current range and in this range, a significant performance degradation known as 'efficiency droop' occurs. Auger process, carrier leakage process, field effect due to lattice mismatch and thermal effects have been discussed as the causes of loss of efficiency, and these phenomena are major hindrance in LED performance. In order to investigate the main effects of efficiency loss and overcome such effects, it is essential to obtain relative proportion of measurements of internal quantum efficiency (IQE) and various radiative and nonradiative recombination processes. Also, it is very important to obtain radiative and non-radiative recombination times in LEDs. In this research, we measured the IQE of InGaN/GaN multiple quantum wells (MQWs) LEDs with PSS and Planar substrate using modified ABC equation, and investigated the physical mechanism behind by analyzing the emission energy, full-width half maximum (FWHM) of the emission spectra, and carrier recombination dynamic by time-resolved electroluminescence (TREL) measurement using pulse current generator. The LED layer structures were grown on a c-plane sapphire substrate and the active region consists of five 30 ${\AA}$ thick In0.15Ga0.85N QWs. The dimension of the fabricated LED chip was $800um{\times}300um$. Fig. 1. is shown external quantum efficiency (EQE) of both samples. Peak efficiency of LED with PSS is 92% and peak efficiency of LED with planar substrate is 82%. We also confirm that droop of PSS sample is slightly larger than planar substrate sample. Fig. 2 is shown that analysis of relation between IQE and decay time with increasing current using TREL method.

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Low-Power $32bit\times32bit$ Multiplier Design for Deep Submicron Technologies beyond 130nm (130nm 이하의 초미세 공정을 위한 저전력 32비트$\times$32비트 곱셈기 설계)

  • Jang Yong-Ju;Lee Seong-Soo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.6 s.348
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    • pp.47-52
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    • 2006
  • This paper proposes a novel low-power $32bit\times32bit$ multiplier for deep submicron technologies beyond 130nm. As technology becomes small, static power due to leakage current significantly increases, and it becomes comparable to dynamic power. Recently, shutdown method based on MTCMOS is widely used to reduce both dynamic and static power. However, it suffers from severe power line noise when restoring whole large-size functional block. Therefore, the proposed multiplier mitigates this noise by shutting down and waking up sequentially along with pipeline stage. Fabricated chip measurement results in $0.35{\mu}m$ technology and gate-transition-level simulation results in 130nm and 90nm technologies show that it consumes $66{\mu}W,\;13{\mu}W,\;and\;6{\mu}W$ in idle mode, respectively, and it reduces power consumption to $0.04%\sim0.08%$ of active mode. As technology becomes small, power reduction efficiency degrades in the conventional clock gating scheme, but the proposed multiplier does not.

Preparation and Characterization of Multiferroic $0.7BiFeO_3-0.3BaTiO_3$ Thin Films by Pulsed Laser Deposition (펄스 레이저 증착법으로 제작된 다강체 $0.7BiFeO_3-0.3BaTiO_3$ 박막의 특성 연구)

  • Kim, Kyung-Man;Yang, Pan;Zhu, Jinsong;Joh, Young-Gull;Lee, Hee-Young
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.11a
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    • pp.88-88
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    • 2009
  • $BiFeO_3$(BFO), when forming a solid solution with $BaTiO_3$(BTO), shows structural transformations over the entire compositional range, which not only gives a way to increase structural stability and electrical resistivity but also applies a means to have better ferromagnetic ordering. In this respect, we have prepared and studied 0.7BFO-0.3BTO thin films on $Pt(111)/TiO_2/SiO_2/Si$ substrates by pulsed laser deposition. Various deposition parameters, such as deposition temperature and oxygen pressure, have been optimized to get better quality films. Based on the X-ray diffraction results, thin films were successfully deposited at the temperature of $600^{\circ}C$ and an oxygen partial pressure of 10mTorr. The dielectric, ferroelectric, and magnetic properties have then been characterized. It was found that the films deposited under lower oxygen pressure corresponded to lower leakage current. Magnetism measurement showed an induced ferromagnetism. The microstructures associated with. the magnetic and dielectric properties of this mixed-perovskite solid solutions were observed by transmission electron. microscopy, which revealed the existence of complicated ferroelectric domains, suggested that the weak spontaneous magnetization was closely associated with the decrease in the extent of rhombohedral distortion by a partial substitution of $BaTiO_3$ for $BiFeO_3$.

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