• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.28 no.5
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• pp.366-372
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• 2017

In this paper, the analysis of baluns that are inevitably required to design a differential low noise amplifier, The balun converts a single signal input from the antenna into a differential signal, which serves as an input to the differential amplifier. In addition, it protects the circuit from ESD(Electrostatic Discharge) coming through the antenna and helps with input matching. However, in the case of a passive balun used in general, since the AC signal is transmitted through electromagnetic coupling formed between two metal lines, it not only has loss without gain but also has the greatest influence on the total noise figure of the receiving end. Therefore, the design of a balun in a low-noise amplifier is very important, and it is important to design a balun in consideration of line width, line spacing, winding, radius, and layout symmetry that are necessary. In this paper, the factors to be considered for improving the quality factor of balun are summarized, and the tendency of variation of resistance, inductance, and capacitance of the balun according to design element change is analyzed. Based on the analysis results, it is proved that the design of input balun allows the design of low noise, high gain differential amplifier with gain of 24 dB and noise figure of 2.51 dB.

• Journal of Food Hygiene and Safety
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• v.14 no.3
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• pp.293-304
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• 1999

The purpose of this study was to evaluate the microbiological quality, and to assure the hygienic safety of the food production in the university food service facility located in Seoul in accordance with the Hazard Analysis Critical Control Point(HACCP) concepts. In the hygienic state assessment of kitchen, it has revealed that it was very important to remove water from the kitchen floor and to establish standard method for disinfection of cooking utensils. And foodservice workers were required to have training program for the safe handling of food and utensils since they did treat food without hygienic gloves. The kitchen layout had to be improved because the near distance of table with heating unit and shelf might cause the growth of microorganisms when prepared food was kept on the shelf. In terms of the timetemperature measurement and microbiological quality assessment during each of the food production phases, most of sengchae (raw vegetable dish) and namul (cooked vegetable dish) were treated within danger zone for food safeness ($5~60^{\circ}C$). It has shown that the microbiological quality of raw materials was very much inferior at the time of receiving based on the TPC($10^{5}~10^{7}$), coliform($10^{3}~1O^{6}$), which was not acceptable level(TPC:$10^{6}$, coliform:$10^{3}$) suggested by Solberg. Microbiological growth has increased in the both of sengchae and namul considerably during most of food production phase. Therefore, it is extremely important to reduce holding and serving time and to avoid treating food within the danger zone for food safeness. In addition, the prevention of cross-contamination during mixing the ingredients with improper equipments and with insanitary treatments by workers was also important to keep the food safety in this speciqic university foodservice facility.

• Journal of architectural history
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• v.1 no.2 s.2
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• pp.68-84
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• 1992

The development of Buddhist architectures of the Unified Silla period have been generally understood to have paired pagoda instead of one which had been popular until before the unification. Besides the stylistic categorization of paired pagoda system, there had been no further investigation reported concerning whether there was any detailed process of change within the development of paired pagoda style. This paper aims to identify such change inside the development of paired pagoda style, which, externally, seems to be the same pattern of site design maintained throughout the period of Unified Silla that lasted for about three centuries. Since the temple sites of study are in the same pattern of layout, the method of investigation has to be such that can identify the subtle changes that, in external appearance, are not easily discernible. Hence, this research compared the dimensions of important measurement of five temple sites to be able to clarify the process of minor changes. Among many sites of Silla temples, only five were suitable for the research since detailed measurement were possible through field research or the report of excavation. They are the sites of Sachonwang-sa, Mangduk-sa, site of Kunsuri, and Bulguk-sa. Although the five sites have the same style of paired pagoda, it is clear that there were consistant flow of change. Even though the motivation of such change were not strong enough to change the site pattern itself, it resulted continuous minor changes such as the size and location of architectures. The size of image hall, for example, was growing larger and larger as time goes on, while, the size of Pagoda was getting smaller. In the same way, the size of middle gate became smaller while the size of lecture hall became larger, although the rate of change in these cases were not as severe as that of image hall and pagoda. At the same time, pagoda was coming closer to the middle gate leaving larger space in front of the image hall. Such aspect is even more meaningful considering the fact that the pagoda, from the 8th century in Japan and China, moved outside of the major precinct. The image hall, too, moved toward the middle gate slightly so that the space in front of the lecture hall became more spacious. Such changes, of course, were not accidental but they are the same continuous motivation of change that caused the changes before the period of unification. Enlargement of image hall and reduction of pagoda, for example, represent the changing relative importance of religious meaning. Hence, it is evident that one can not easily imterprete the development of one style only by categorizing it to be one same style. In the veiwpoint of the underlying motivation of change, the fact that one style persisted for a certain period of time, does not mean there had been no change, but means that it was the time of motivational accumulation, causing minor changes within the same style, to be able to create major change coming after.

• Journal of the HCI Society of Korea
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• v.1 no.1
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• pp.73-80
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• 2006

Mitologia is about visualizing relations of information in user-oriented method. Most information given in life has invisible relations with each other. By analyzing the common characters and relations of information, we can not only measure the importance of the information but also grasp the overall properties of the information. Especially human relations are the major concerns of social network having several visualization methodologies shown by analyzing relations of each individual in society. We applied social network theory to grasp relationships between characters in Greek mythology representing a limited society. But the current tools of social network analysis have limits that they show the information one-sided way because of the ignorance of user-oriented design. Mitologia attempts to suggest the visual structure model more effective and easy to understand in analyzing data. We extracted connections among myth characters by evaluating classes, frequencies of appearance and emotional links they have. And we raised the understanding of users with furnishing the proper interaction to the information. The initial interface offers 4 kinds of indexes helping to access character nodes easily, while zoom-in function can be used for the detailed relations. The Zoom-in is quite different from usual filtering methods. It makes the irrelative information invisible so that users can find out the characters' relation more easily and quickly. This project suggests the layout to show overall information relationships and the appropriate interactions to present detailed information at the same time.

• Journal of Navigation and Port Research
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• v.29 no.1 s.97
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• pp.9-15
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• 2005

To design ship channel is one of important factors for planning and developing a port. In most case, the core factors for designing ship channel are the layout and width of channel provided the net underkeel clearance is secured to be safe enough to pass. In this study, Variable Bumper Area(VBA) model is applied to design and assess ship channel. This model reflects ship's particular, ship domain theory, ship speed and mariner's ship handling skill and experience, especially external forces which cause leeway, set and drift and the change of ship maneuvering characteristics. A real time, full mission shiphandling simulator is used to analyze ship dynamic data according to mariner's ship control, external forces, ete. This model defines Domain degree and Domain-index for assessing the efficiency and safety of the channel. The proposed model is applied to Ulsan new port plan which has a channel width of 1.5 times the length of the largest vessel, a radius of 5 times the length of the largest vessel in a curve of 57 degree centerline angle and SBM facility adjacent to the lateral edge of channel. The result of this study shows that the width of the channel and radius of channel curve are suitable for the target ship but the difficulty of ship handling is caused by the large course change and SBM located in the vicinity of channel.

• Archives of design research
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• v.14
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• pp.1-7
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• 1996

Designers often hesitate to decide the shape, size, and layout of a product. Though ergonomic principles and data are absolutely needed in this process, they don have enough guidelines to refer. For the refrigerator designers, they also are not convinced of their decision: the vertical position of the freezing and refrigerating rooms, the height of shelves, the shape of door-handle, etc. To support the refrigerator design, we applied several ergonomic methods to the evaluation of refrigerator. EMG was measured to evaluate the load of users lumbar muscle. Based upon the experimental EMG data, we developed a model to estimate the relative load corresponding to the height of refrigerator shelves. Two different layouts of a refrigerator, R/F and F/R styles, were compared with the model. A three-dimensional motion analysis method was used to evaluate the users motion of using a refrigerator. Ten door-handles with the different shapes and positions were evaluated by tracking the rotations of the users arm. Video protocol analysis was used to evaluate the user interface of a control panel in a refrigerator. Finally, we suggested several ergonomic design guidelines based on the facts found in this research and the anthropometric data of the Korean adults. The results of this study can be applied to the ergonomic design of refrigerators

• Journal of the Computational Structural Engineering Institute of Korea
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• v.30 no.5
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• pp.453-460
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• 2017

In the offshore industry, helicopters are mainly used for transportation of goods or operating personnel between offshore sites and onshore facilities. A helideck is a structure that is required for landing and take-off of helicopters on the offshore structure. There are several shapes of helidecks depending on the type of offshore structures or installation location. Among them, cantilever-type helidecks usually provide more space on the topside of offshore structures and it is safer against potential accidents like fire or explosion. In this paper, the cantilever-type helideck is selected for the research object and topology design optimization is applied for lightweight design of the helideck. A finite element model is then created from the optimal layout of truss structures of the helideck, and structural analysis is performed under various landing conditions and wind loads. Based on the analysis results, the detailed section dimensions of structural members are determined so that the maximum stress at each structure member does not exceed the allowable stress of the structural material. Also, the final optimal design shows significant decrease in the total weight of the helideck.

• Journal of the Korea Society of Computer and Information
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• v.16 no.11
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• pp.67-76
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• 2011

This paper describes the development of interactive visualization techniques and a program that allow us to visualize the structure of the volume data and interactively select and visualize the isosurface components using contour tree. The main characteristic of this technique is to provide an algorithm that draws the contour tree in 2D plane in a way that users easily understand the tree, and to provide an algorithm that can efficiently extract an isosurface component utilizing GPU's parallel architecture. The main characteristic of the program we developed through implementing the algorithms is to provide us with an interactive user interface based on the contour tree for extracting an isosurface component and visualization that integrates with previous isosurface and volume rendering techniques. To show the excelland vof our methods, we applied 3D biomedical volume data to our algorithms. The results show that we could interactively select the isosurface components that represent a polypeptide chain, a ventricle and a femur respectively using the user interface based on our contour tree layout method, and extract the isosurface components with 3x-4x higher speed compared to previous methods.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.11
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• pp.24-32
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• 2002

In this paper we implemented various image processing filtering using the format converter. This design method is based on realized the large processor-per-pixel array by integrated circuit technology. These two types of integrated structure are can be classify associative parallel processor and parallel process DRAM(or SRAM) cell. Layout pitch of one-bit-wide logic is identical memory cell pitch to array high density PEs in integrate structure. This format converter design has control path implementation efficiently, and can be utilize the high technology without complicated controller hardware. Sequence of array instruction are generated by host computer before process start, and instructions are saved on unit controller. Host computer is executed the pixel-parallel operation starting at saved instructions after processing start. As a result, we obtained three result that 1)simple smoothing suppresses higher spatial frequencies, reducing noise but also blurring edges, 2) a smoothing and segmentation process reduces noise while preserving sharp edges, and 3) median filtering, like smoothing and segmentation, may be applied to reduce image noise. Median filtering eliminates spikes while maintaining sharp edges and preserving monotonic variations in pixel values.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.9
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• pp.54-65
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• 1999

As the integration ratio and operating speed increase, it has become an important problem to estimate the dissipated power during the design procedure to reduce th TTM(time to market). This paper proposed a prediction model for the maximum dissipated power of a CMOS logic gate. This model uses a calculating method. It was constructed by including the characteristics of MOSFETs, the operational characteristics of the gate, and the characteristics of the input signals. As the construction procedure, a maximum power estimation model for CMOS inverter was formed first, And then, a conversion model to convert a multiple input CMOS gate into a corresponding CMOS inverter was proposed. Finally, the power model for inverter was applied to the converted result so that the model could be applied to a general CMOS gate. We designed several CMOS gates in layout level with $0.6{\mu}m$ design rule to apply both to HSPICE simulation and to the proposed models. The comparison between the two results showed that the gate conversion model and the power estimation model had within 5% and 10% of the relative errors, respectively. Those values show that the proposed models have sufficient accuracies. Also in calculation time, the proposed models were more than 30 times faster than HSPICE simulation. Consequently, it can be said that the proposed model could be used efficiently to estimate the maximum dissipated power of a CMOS logic gate during the design procedure.