• Journal of Genetic Medicine
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• v.16 no.2
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• pp.49-54
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• 2019

Purpose: Potocki-Lupski syndrome (PTLS), is a recently identified, rare genomic disorder. The patients are affected by infantile hypotonia, poor growth and developmental delay. Facial dysmorphism may not be obvious in some patients. PTLS is associated with microduplication at chromosome 17p11.2. In the current study, three Korean patients are reported with their clinical and genetic features. Materials and Methods: The clinical findings of each patient were reviewed. Karyotyping and multiplex ligation-dependent probe amplification (MLPA) analyses were done for genetic diagnoses. Results: All the patients did not have the characteristic dysmorphic features, such as broad forehead, triangular face, asymmetric smile and palpebral fissures. On the other hand, all three patients were affected by variable degree of developmental delay, poor oral intake, failure to thrive, and language development disorders. Chromosome 17p11.2 duplication was identified by conventional karyotyping analysis only in one patient, whereas the other confirmed by MLPA analyses. Conclusion: Delayed development was mostly commonly observed in our patients without distinct dysmorphic facial features. In this respect, genomic screening in patients with developmental delay would identify more cases with PTLS to understand their long-term clinical courses with the development of adequate psychological and rehabilitation education program.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.12
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• pp.59-68
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• 1999

The timing characteristics of an ASIC are analyzed based on the propagation delays of each gate and interconnect wire. The gate delay can be modeled using the two-dimensional delay table whose index variables are the input transition time and the output load capacitance. The AWE technique can be adopted as an algorithm to compute the interconnect delay. Since these delays are affected by the interaction to the two-dimensional delay table and the AWE technique. A method to model this effect has been proposed through the effective capacitance and the gate driver model under the assumption of single driving gate. This paper presents a new technique to handle the multiple CMOS gates driving interconnect wire by extending previous approach. This technique has been implemented in C language and applied to several interconnect circuits driven by multiple CMOS gates. In most cases, we found a few tens of speed-up and only a few percents of errors in computing both of gate and interconnect delays, compared to SPICE.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.12
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• pp.87-95
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• 2009

In this paper, an area-efficient FFT processor is proposed for MIMO-OFDM based SDR systems. The proposed scalable FFT processor can support the variable length of 64, 128, 512, 1024 and 2048. By reducing the required number of non-trivial multipliers with mixed-radix (MR) and multi-path delay commutator (MDC) architecture, the complexity of the proposed FFT processor is dramatically decreased without sacrificing system throughput The proposed FFT processor was designed in hardware description language (HDL) and synthesized to gate4eve1 circuits using 0.18um CMOS standard cell library. With the proposed architecture, the gate count for the processor is 46K and the size of memory is 64Kbits, which are reduced by 59% and 39%, respectively, compared with those of the 4-channel radix-2 single-path delay feedback (R2SDF) FFT processor. Also, compared with 4-channel radix-2 MDC (R2MDC) FFT processor, it is confirmed that the gate count and memory size are reduced by 16.4% and 26.8, respectively.

• Journal of The Korean Society of Inherited Metabolic disease
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• v.13 no.2
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• pp.98-103
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• 2013

Purpose: MAT-I/III deficiency by MAT1A gene mutation causes isolated hypermethioninemia, which is considered to be a clinically benign disease. But in some patients, mental retardation, developmental delay, myelination disorder may be shown. This study was performed to find out the clinical manifestations and genetic characteristics of patients with isolated hypermethioninemia. Methods: Clinical, biochemical and genetic analysis were done to 10 patients with isolated hypermethioninemia who were referred to department of pediatrics, Soonchunhyang University Hospital from March 1999 to March 2012. Results: At first visit, all patients' mean plasma methionine level was 5.5 mg/dL (2.1-14.6) and there were no increase of amino acid levels including homocystine in all patients. Serum homocysteine level was evaluated in seven patients who visited after year 2003, and ranged from 4.96 to $11.15{\mu}mol/L$ (normal < $25{\mu}mol/L$). Methionine restricted diet was started to all patients. Nine patients who managed regularly showed normal development, but one patient whose initial plasma methionine level was 14.6 mg/dL showed language delay at 1 year of age and was diagnosed as mild mental retardation (IQ=66) at 6 years of age. Genetic analysis was done to eight patients, R264H mutation was identified in seven patients. Also, both R299C and R356Q mutation were identified in one patient. Conclusion: Clinical findings in patients with isolated hypermethioninemia were generally good, but one patient showed mental retardation and language difficulty. R264H mutation which usually inherits as an autosomal dominant trait was most frequently found in our patients, and R299C/R356Q mutation were also identified.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.4
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• pp.21-29
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• 1998

As silicon geometry shrinks into deep submicron and the operating speed icreases, higher accuracy is required in the analysis of the propagation delays of the gates and interconnects in an ASIC. In this paper, the driving characteristics of a CMOS gate is represented by a gatedriver model, consisting of a linear resistor $R_{dr}$ and an independent ramp voltage source $V_{dr}$ . We drivered $R_{dr}$ and $V_{dr}$ as the functions of the timing data representing gate driving capability and an effective capacitance $C_{eff}$ reflecting resistance shielding effect by interconnet circuits. Through iterative applications of these equations and AWE algorithm, $R_{dr}$ , $V_{dr}$ and $C_{eff}$ are comuted simulataneously. then, the gate delay is decided by $C_{eff}$ and the interconnect circuit delay is determined by $R_{dr}$ and $V_{dr}$ . this process has been implemented as an ASIC timing analysis program written in C language and four real circuits were analyzed. In all cases, we found less than 5% of errors for both of gate andinterconnect circuit delays with a speedup factor ranging from a few tens to a few hundreds, compared to SPICE.SPICE.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.510-513
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• 2005

Due to the asymptotic property, deadbeat control can hardly be applied to the continuous time system control. But some delay element method can deal such a problem. Besides delay element method, well-known digital deadbeat control can be used by the aid of some smoothing elements. In this paper, 2nd order smoothing element is used for the smoothing of the digital deadbeat controller. And this element is argumented to the plant, and so control problem is to control the argumented system digitally. We simulated this control system using Matlab language and finally apply this algorithm to the rotary inverted pendulum system.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.18 no.6
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• pp.108-113
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• 2004

Due to the asymptotic Property, deadbeat control can hardly be applied to the continuous time system control. But some delay element method can deal such a problem. Besides delay element nan well-known digital deadbeat control can be used by the aid of some smoothing elements. in this paper, 2nd order smoothing element is used for the smoothing or the digital deadbeat controller. And this element is argumented to the plant and so control problem is to control digitally the argumented system. We simulated this control system using Matlab language and finally apply this algorithm to the rotary inverted pendulum system.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.11
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• pp.64-74
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• 1999

A new clock skew optimization for clock routing using link-edge insertion is proposed in this paper. It satisfies the given skew bound and prevent the total wire length from increasing. As the clock skew is the major constraint for high speed synchronous ICs, it must be minimized in order to obtain high performance. But clock skew minimization can increase total wire length, therefore clock routing is performed within the given skew bound which can not induce the malfunction. Clock routing under the specified skew bound can decrease total wire length Not only total wire length and delay time minimization algorithm using merging point relocation method but also clock skew reduction algorithm using link-edge insertion technique between two nodes whose delay difference is large is proposed. The proposed algorithm construct a new clock routing topology which is generalized graph model while previous methods uses only tree-structured routing topology. A new cost function is designed in order to select two nodes which constitute link-edge. Using this cost function, delay difference or clock skew is reduced by connecting two nodes whose delay difference is large and distance difference is short. Furthermore, routing topology construction and wire sizing algorithm is developed to reduce clock delay. The proposed algorithm is implemented in C programming language. From the experimental results, we can get the delay reduction under the given skew bound.

• KSCE Journal of Civil and Environmental Engineering Research
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• v.43 no.1
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• pp.109-117
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• 2023

Schedule delays present a major risk factor, as they can adversely affect construction projects, such as through increasing construction costs, claims from a client, and/or a decrease in construction quality due to trims to stages to catch up on lost time. Risk management has been conducted according to the importance and priority of schedule delay risk, but quantification of risk on the depth of schedule delay tends to be inadequate due to limitations in data collection. Therefore, this research used the BERT (Bidirectional Encoder Representations from Transformers) language model to convert the contents of aconstruction log, which comprised unstructured data, into WBS (Work Breakdown Structure)-based structured data, and to form a model of classification and quantification of risk. A process was applied to eight highway construction sites, and 75 cases of rain schedule delay risk were obtained from 8 out of 39 detailed work kinds. Through a K-S test, a significant probability distribution was derived for fourkinds of work, and the risk impact was compared. The process presented in this study can be used to derive various schedule delay risks in construction projects and to quantify their depth.

• Clinical and Experimental Pediatrics
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• v.64 no.10
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• pp.497-503
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• 2021

Reading disability (dyslexia) refers to an unexpected difficulty with reading for an individual who has the intelligence to be a much better reader. Dyslexia is most commonly caused by a difficulty in phonological processing (the appreciation of the individual sounds of spoken language), which affects the ability of an individual to speak, read, and spell. In this paper, I describe reading disabilities by focusing on their underlying neurobiological mechanisms. Neurobiological studies using functional brain imaging have uncovered the reading pathways, brain regions involved in reading, and neurobiological abnormalities of dyslexia. The reading pathway is in the order of visual analysis, letter recognition, word recognition, meaning (semantics), phonological processing, and speech production. According to functional neuroimaging studies, the important areas of the brain related to reading include the inferior frontal cortex (Broca's area), the midtemporal lobe region, the inferior parieto-temporal area, and the left occipitotemporal region (visual word form area). Interventions for dyslexia can affect reading ability by causing changes in brain function and structure. An accurate diagnosis and timely specialized intervention are important in children with dyslexia. In cases in which national infant development screening tests have been conducted, as in Korea, if language developmental delay and early predictors of dyslexia are detected, careful observation of the progression to dyslexia and early intervention should be made.