• Korean Journal of Remote Sensing
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• v.36 no.5_1
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• pp.785-791
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• 2020

The radiance measured from satellite has noise due to atmospheric effect. Atmospheric correction is the process of calculating surface reflectance by removing atmospheric effect and surface reflectance is calculated by the Radiative Transfer Model (RTM)-based Look-Up Table (LUT). In general, studies using a LUT make LUT for each channel with the same atmospheric and geometric conditions. However, atmospheric effect of atmospheric factors do not react sensitively in the same channel. In this study, the LUT for each channel of Korea Multi-Purpose SATellite (KOMPSAT)-3/3A was made under the same atmospheric·geometric conditions. And, the accuracy of the LUT was verified by using the simulated Top of Atmosphere radiation and surface reflectance in the RTM. As a result, the relative error of the surface reflectance in the blue channel that sensitive to the aerosol optical depth was 81.14% at the maximum, and 42.67% in the NIR (Near Infrared) channel.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.2
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• pp.62-68
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• 2007

This paper proposes an efficient integer division algorithm for high speed FPGAs' which support built-in RAMs' and multipliers. The integer division algorithm is iterative with RAM-based LUT and multipliers, which minimizes the usage of logic fabric and connection resources. Compared with some popular division algorithms such as division by subtraction or division by multiply-subtraction, the number of iteration is much smaller, so that very low latency can be achieved with pipelined implementations. We have implemented our algorithm in the Xilinx virtex-4 FPGA with VHDL coding and have achieved 300MSPS data rate in 17bit integer division. The algorithm used less than 1/6 of logic slices, 1/4 of the built-in multiply-accumulation units, and 1/3 of the latencies compared with other popular algorithms.

• Journal of the Korean Graphic Arts Communication Society
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• v.20 no.2
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• pp.85-93
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• 2002

Recently, the flatbed scanner is widely used to input color original copy in printing industry. In the process of RGB-to-CMY transformation for the scanned colors using the look-up table(LUT) based on the color gamut of the actual output device, however, the problem that some colors in the original out of the gamut cannot be printed, may occur. In this study, another color transformation method applicable to any kind of originals using the new LUT with extended gamut based on the ideal output device, was examined and proposed.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.11
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• pp.3094-3097
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• 2009

The use of general-purpose divider is inevitable to implement a image down-scaler when an arbitrary scaling ratio is given. To get an output at every clock from the divider, the divider should be implemented by LUT, however, its hardware size will be bigger and bigger as the precision level is increased. In this paper, a new image scaling algorithm is presented for a arbitrary scaling ratio, which do not requires a general-purpose or LUT-based divider. The proposed algorithm utilizes only comparators and adders such that the hardware size can be reduced by 1/10 compared to the conventional approaches.

• Journal of electromagnetic engineering and science
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• v.9 no.3
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• pp.152-158
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• 2009

We have developed a novel digital feedback predistortion(DFBPD) linearization based on RF feedback PD for the wide bandwidth modulated signals. The wideband PD operation is carried out by combining the DFBPD and memory lookup table(LUT). To experimentally demonstrate the linearization performance of the proposed PD technique for wideband signal, a class-AB amplifier using an LDMOSFET MRF6S23140 with 140-W peak envelope power is employed at 2.345 GHz. For a forward-link 2FA wideband code-division multiple-access signal with 10 MHz carrier spacing, the proposed DFBPD with memory LUT delivers the adjacent channel leakage ratio at an 10 MHz offset of -56.8 dBc, while those of the amplifier with and without DFBPD are -43.2 dBc and -41.9 dBc, respectively, at an average output power of 40 dBm. The experimental result shows that the new DFBPD with memory LUT provides a good linearization performance for the signal with wide bandwidth.

• Journal of the Korean Graphic Arts Communication Society
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• v.25 no.1
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• pp.121-133
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• 2007

The CMS(color management system) software was to enable consistent color reproduction from original to reproduction. The CMS was to create RGB monitor and printer characterization profiles and then use the profiles for device independent color transformation. The implemented CMM(color management module) used the CIELAB color space for the profile connection. Various monitor characterization model was evaluated for proper color transformation. To construct output device profile, SLI(sequential linear interpolation) method was used for the color conversion from CMYK device color to device independent CIELAB color space and tetrahedral interpolation method was used for backward transformation. UCR(under color removal) based black generation algorithm was used to construct CIELAB to CMYK LUT(lookup table). When transforming the CIE Lab colour space to CMYK, it was possible to involve the gray revision method regularized in the brightness into colour transformation process and optimize the colour transformation by black generation method based on UCR technique. For soft copy colour proofing, evaluating several monitor specialism methods showed that LUT algorithm was useful. And it was possible to simplify colour gamut mapping by constructing both the look-up table and the colour gamut mapping algorithm to a reference table.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2011.11a
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• pp.49-52
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• 2011

본 논문에서는 구간선형 모델을 적용하여 낮은 복잡도를 가지는 LSC(Lens-Shading Correction) 알고리즘을 제안한다. 제안한 알고리즘은 각 화소와 렌즈 중심점으로부터 거리를 정수형으로 계산하고, 이 정수를 거리에 대한 LSC 이득값이 저장된 LUT(Look-Up Table)에 대한 주소로 적용하여, 입력 화소 값에 곱함으로써 LSC를 수행한다. 거리를 구하려면 제곱근 회로가 추가되어야 한다. LUT에 저장된 이득값은 원점으로부터의 거리에 대한 평균 이득값을 저장하고 있기 때문에, 제곱근 계산에 높은 정밀도를 할애하여도 LSC 보상된 영상의 화질에 미치는 영향은 높지 않으므로 정수형 제곱근 연산을 수행한다. 제곱근 계산은 구간 선형화하여 단지 덧셈과 쉬프트 연산만으로 제곱근 연산을 완료할 수 있도록 간략화 하였다. 제안한 알고리즘을 양산 중인 일반 카메라 모듈에 적용한 결과, 카메라모듈 제조업체의 LSC 평가 기준을 상회하는 수준으로 나타나며, 구현될 하드웨어 복잡도가 매우 낮아서 모바일 카메라 구현에 매우 적합하다.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2016.11a
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• pp.60-62
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• 2016

이동통신 시스템의 OFDM(Othogonal frequency division multiplexing) 신호는 큰 PAPR(Peak to Average Power Ratio)을 가지기 때문에 비선형 특성을 가지는 전력 증폭기의 효율 감소를 가져온다. 이러한 전력 증폭기의 비선형 특성을 개선하여 효율을 증가시키기 위해서 전력 증폭기의 역 특성을 가지는 디지털 전치 왜곡기가 이용된다. 본 논문에서는 제곱근 근사를 이용한 Look-up Table(LUT) 기반의 디지털 전치왜곡(Digital Pre-Distortion :DPD) 기법을 제안한다. 제안하는 방식은 복소 이득(Complex Gain) LUT 구조에서 입력신호의 크기를 구할 때, 기존의 테이블을 이용하여 제곱근 연산을 하는 방식보다 좋은 성능을 내면서 근사를 위한 테이블의 메모리를 필요로 하지 않는다. 또한 간단한 쉬프트 연산 등을 이용하므로 DSP 또는 MCU 기반의 DPD를 구현할 때 간단하게 구현 될 수 있다는 장점을 갖는다. 컴퓨터 모의실험을 통해 제안하는 제곱근 근사방식을 이용한 DPD와 기존의 방식을 사용한 DPD를 비교함으로써 제안하는 방식이 기존 방식보다 좋은 성능을 내면서도 보다 효율적으로 구현될 수 있음을 검증하였다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.7
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• pp.29-38
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• 2009

In this paper, a high performance pipelined computing design of parallel multiplier-temporal buffer-parallel accumulator is present for the convolution-based non-cascaded architecture aiming at the real time Discrete Wavelet Transform(DWT) processing. The convolved multiplication of DWT would be reduced upto 1/4 by utilizing the filter coefficients symmetry and the up/down sampling; and it could be dealt with 3-5 times faster computation by LUT-based DA multiplication of multiple filter coefficients parallelized for product terms with an image data. Further, the reutilization of computed product terms could be achieved by storing in the temporal buffer, which yields the saving of computation as well as dynamic power by 50%. The convolved product terms of image data and filter coefficients are realigned and stored in the temporal buffer for the accumulated addition. Then, the buffer management of parallel aligned storage is carried out for the high speed sequential retrieval of parallel accumulations. The convolved computation is pipelined with parallel multiplier-temporal buffer-parallel accumulation in which the parallelization of temporal buffer and accumulator is optimize, with respect to the performance of parallel DA multiplier, to improve the pipelining performance. The proposed architecture is back-end designed with 0.18um library, which verifies the 30fps throughput of SVGA(800$\times$600) images at 90MHz.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.12
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• pp.1844-1850
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• 2016

The bilateral filter can reduce the noise while preserving details computing the filtering output at each pixels as the average of neighboring pixels. In this paper, we propose a real-time system based on window division. Overall performance is increased due to the parallel architectures which computes five rows in the kernel window simultaneously but with pipelined scheduling. We consider the tradeoff between the filter performance and the hardware cost and the bit allocation has been determined by PSNR analysis. The proposed architecture is designed with verilogHDL and synthesized using Dongbu Hitek 110nm standard cell library. The proposed architecture shows 416Mpixels/s (397fps) of throughput at 416MHz of operating frequency with 132K gates.