• Journal of Korean Institute of Industrial Engineers
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• v.39 no.5
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• pp.342-350
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• 2013

Dual response surface optimization (DRSO), inspired by Taguchi's philosophy, attempts to optimize the process mean and variability by using response surface methodology. Researches on DRSO were extensively done in 1990's and have been matured recently. This paper reviews the existing DRSO methods from the decision making perspective. More specifically, this paper classifies the existing DRSO methods based on the optimization criterion and the timing of preference articulation. Also, some of case studies are reviewed. Extension to multiresponse optimization, triple response surface optimization, and application of data mining method are suggested as future research issues.

• Journal of Biomedical Engineering Research
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• v.16 no.1
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• pp.101-106
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• 1995

In this paper, the patient monitor consisting of ECG/Respiration Amplification, Front end CPU, Main CPU, Main Controller, Video Amplifier, Display Controller, Waveform Generator, Bus & Power Supply, 8097 Processor was developed. This patient monitor measures the patient's states in the hospital such as elecctro-cardiography, respiration, blood pressurae and temperature. The control and processing methods based on micro-processor employ the flexibility, extensibility over other conventional system. The followings are incorporated in this system. First, ECG/RESP measures the respiration by impedence pneumography. Second, FECPU utilizes an Intel 8031 microcontroller. Third, Controller function originate from a LSI CRT controller.

• 한국정보통신설비학회:학술대회논문집
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• 2002.08a
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• pp.21-23
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• 2002

In millimeter wave applications, it is often necessary to use transitions between waveguide and planar circuits. Finline structures can be used effectively to this purpose. In multilayered case, it is necessary to analyze the structure with numerical method such as spectral domain immittance method. The design procedure uses tile cutoff frequency for each taper width. The dispersion data in a single layer are compared with those in literature. The performance of the designed finline taper is verified with the FEM simulation using HFSS.

• Journal of information and communication convergence engineering
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• v.9 no.2
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• pp.155-160
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• 2011

In distributed source localization where sensors transmit measurements to a fusion node, we address the sensor selection problem where the goal is to find the best set of sensors that maximizes localization accuracy when quantization of sensor measurements is taken into account. Since sensor selection depends heavily upon rate assigned to each sensor, joint optimization of rate allocation and sensor selection is required to achieve the best solution. We show that this task could be accomplished by solving the problem of allocating rates to each sensor so as to minimize the error in estimating the position of a source. Then we solve this rate allocation problem by using the generalized BFOS algorithm. Our experiments demonstrate that the best set of sensors obtained from the proposed sensor selection algorithm leads to significant improvements in localization performance with respect to the set of sensors determined from a sensor selection process based on unquantized measurements.

• 전기의세계
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• v.34 no.7
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• pp.398-403
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• 1985

IC는 수많은 전자부품중에서 가장 기본적인 부품으로서 현재 산업사회에서는 필수 불가결한 존재로 부각되어 있다. IC의 집적도는 SSI로부터 MSI, LSI를 거쳐 현재에는 VLSI의 단계가 실용화 되고 있으며 IC가 새로운 기기의 기능을 주도하고, 전기전자 공업의 발전에 원동력이 되고 있다는 것은 이미 기정 사실로 되고 있다. 최근 IC는 "산업의 핵" 또는 "산업의 공기"라고 불리울 만큼 그 역할 또한 큰 비중을 차지하면서 전 산업분야에서 폭넓게 사용되고 있으며 IC는 그 자체가 고도성장산업분야에 속해 있지만 IC가 산업의 미래상과 같이 중요성을 가졌기 때문에 최근에는 우리나라의 럭키금성, 현대, 삼성 및 대우그룹을 비롯하여 세계규모의 기업간 경쟁이 강화되어 가고 있다. IC시장은 1980년대의 전반기를 통하여 IC기술이 급속한 진보에 의해 다이나믹한 전개를 이룩한 것으로 볼수 있지만, IC시장의 장래를 전망하는 경우 세계적인 시점으로 보는 것은 매우 중요한 것이라 생각된다. 따라서 본 해설에 있어서는 서방자유세계를 중심으로 IC의 수급, 제품종별의 시장및 지역별 시장등에 관하여 1985년까지의 동향을 살펴보고 1980년대 전반기의 IC시장에 관한 흐름을 고찰하여 1980년대 후반기의 시장 및 기술개발의 전망에 관하여 기술하고자 한다.발의 전망에 관하여 기술하고자 한다.

• Journal of Welding and Joining
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• v.13 no.4
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• pp.14-23
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• 1995

Micro soldering 기술의 응용은 주로 전자제품에 이용되며, 특히 컴퓨터 정보 통신 기기의 집합.접속 기술의 중추적인 역할을 하고 있다. 아울러 이 분야는 일본, 미국이 선구적인 역할을 하고 있으며, 예를 들어 일본 전자산업의 1994년도 생산액이 앤 고의 열쇠에 불구하고 민생용.산업용 전자기기 및 전자 부품의 3부분에서 약 .yen.30조(250조원)에 달한 것으로 보면 그 규모 및 중요성을 알 수 있다. 이것은 기본 적으로 반도체의 집적도가 높아진것(LSI.rarw.VLSI.rarw.ULSI)과 아울러 소자를 접합 접속시키는 기술이 확보되었기 때문에 이루어진 결과라고 말할 수 있다. 따라서 본 기술 해설에서는 접합.접속 기술의 하나인 Micro soldering의 각종 프로세스 중에서 도 특히 기본이 되는 리플로우 프로세스(reflow process)를 중심으로 기술하였으며 아울러 신뢰성의 제반사항에 관하여 간략하게 기술하였다.

• ETRI Journal
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• v.28 no.4
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• pp.425-434
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• 2006

We propose a fast macroblock mode prediction and decision algorithm based on contextual information for Pslices in the H.264/AVC video standard, in which the mode prediction part is composed of intra and inter modes. There are nine $4{\times}4$ and four $16{\times}16$ modes in the intra mode prediction, and seven block types exist for the best coding gain based on rate-distortion optimization. This scheme gives rise to exhaustive computations (search) in the coding procedure. To overcome this problem, a fast inter mode prediction scheme is applied that uses contextual mode information for P-slices. We verify the performance of the proposed scheme through a comparative analysis of experimental results. The suggested mode search procedure increased more than 57% in speed compared to a full mode search and more than 20% compared to the other methods.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.1098-1100
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• 2005

The floorplanning problem is an essential design step in VLSI layout design and it is how to place rectangular modules as density as possible. And then, as the DSM advances, the VLSI chip becomes more congested even though more metal layers are used for routing. Usually, a VLSI chip includes several buses. As design increases in complexity, bus routing becomes a heavy task. To ease bus routing and avoid unnecessary iterations in physical design, we need to consider bus planning in early floorplanning stage. In this paper, we propose a floorplanning method for topological constraint consisting of bus constraint and memory constraint. The proposed algorithms based on Genetic Algorithm(GA) is adopted a sequence pair. For selection control, new objective functions are introduced for topological constraint. Studies on floor planning and cell placement have been reported as being applications of GA to the LSI layout problem. However, no studies have ever seen the effect of applying GA in consideration of topological constraint. Experimental results show improvement of bus and memory constraint.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.12
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• pp.1841-1851
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• 1990

Self-aligned gate GaAs MESFETs using ion beam deposited tungsten applicable to GaAs LSI fabrication process have been fabricated. Silicon implanted samples were annealed using isothermla two step RTA process and conventional one step RTA process. The electrical and physicla characteristics of annealed samples were investigated using Hall and I-V measurements. As results of measurements, activation characteristics of the isothermal two step RTA process are better than those of one step annealed ones. Using the developed processes, GaAs SAFETs (Self-Aligned Gate FET) have been fabricated and electdrical characteirstics are measured. As results, subthreshold currents of SAGFETs are 6x10**-10 A/\ulcorner, that is compatible to conventional MESFET, maximum transconductances of 0.75\ulcorner gate MESFET using one step RTA process and 2\ulcorner gate MESFET using isothermal two step RTA process are 18 mS/mm, 41 mS/mm respectively.

• Journal of the Korean Institute of Telematics and Electronics
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• v.16 no.6
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• pp.40-47
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• 1979

In the recent developent of D-4 Channel Bank which is the basic PCM multiplex terminal, we utilized the one-chip microprocessor in the design of the Alarm and Trunk processing unit besides we could add more flexible functions, we simplified the logic circuits and the discrete parts. Since in Korea, we are lacking in the semiconductor technology, the microprocessor applications in the communication systems desist give us the meaningful advantages in the a aspects of economy, reliability and new technology.