• Title/Summary/Keyword: LG Electronics Co.

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Design and Implementation of Content Switching Network Processor and Scalable Switch Fabric

  • Chang, You-Sung;Yi, Ju-Hwan;Oh, Hun-Seung;Lee, Seung-Wang;Kang, Moo-Kyung;Chun, Jung-Bum;Lee, Jun-Hee;Kim, Jin-Seok;Kim, Sang-Ho;Jung, Hee-Jae;Hong, Il-Sung;Kim, Yong-Hwan;Lee, Yu-Sik;Kyung, Chong-Min
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.3 no.4
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    • pp.167-174
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    • 2003
  • This paper proposes a network processor especially optimized for content switching. With 2Gbps port capability, it integrates packet processor cluster, content-based classification engine and traffic manager on a single chip. A switch fabric architecture is also designed for scale-up of the network processor's capability over hundreds gigabit bandwidth. Applied in real network systems, the network processor shows wire-speed network address translator (NAT) and content-based switching performance.

A new BIST methodology for multi-clock system (내장된 자체 테스트 기법을 이용한 새로운 다중 클락 회로 테스트 방법론)

  • Seo, Il-Suk;Kang, Yong-Suk;Kang, Sung-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.7
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    • pp.74-80
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    • 2002
  • VLSI intergrated circuits like SOC(system on chip) often require a multi-clock design style for functional or performance reasons. The problems of the clock domain transition due to clock skew and clock ordering within a test cycle may result in wrong results. This paper describes a new BIST(Built-in Self Test) architecture for multi-clock systems. In the new scheme, a clock skew is eliminated by a multi-capture. Therfore, it is possible to perform at-speed test for both clock inter-domain and clock intra-domain.

Performance Analysis of Deterministic QoS Guarantees on Dynamic Bandwidth Allocation in a Circuit-Switched Satellite Network (결정적 서비스 질을 보장하는 회선 교환 위성 망의 동적 대역폭 할당에 대한 성능 분석)

  • Pae, Tau-Ung;Lee, Jong-Kyu
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.38 no.6
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    • pp.28-38
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    • 2001
  • In this paper, we propose and analyze a more efficient and flexible dynamic data traffic system for a circuit switched satellite network. Our proposed system is more efficient than existing circuit switched satellite networks and allows for dynamic capacity in each connection without rebuilding or resetting the connection software or algorithms. We also discuss an algorithm for bandwidth allocation that provides deterministic quality of service guarantees. The traffic sources are regulated using standard dual leaky buckets; the system performance is analytically evaluated; and the algorithm is verified through simulation. Our analysis scheme and results should prove useful for the design and implementation of protocols in future circuit-switched satellite networks.

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Design of LCD Backlight Driver IC to improve the Brightness Uniformity (LCD Backlight의 휘도 균일성을 개선한 인버터 드라이버 IC 설계)

  • Oh Myeong-Woo;Yang Sung-hyun;Cho Kyoung-Rok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.4 s.334
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    • pp.53-60
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    • 2005
  • This work Proposes and describes an LCD backlight driver IC using a voltage feedback circuit which improves the brightness uniformity. The proposed circuit controls the brightness of a backlight by amplifying of sampling voltage at a lamp. To keep the uniformity of brightness, the circuit has a reference lamp. The output voltage of the reference lamp is supplied commonly to each lamp that reduces a resistance deviation of the lamps. As a result, the proposed circuit shows brightness uniformity improvement of about $40\%$ compared to the conventional ones.

An Efficient SRAM Testing using Dynamic Power Supply Current (동적 전원 공급 전류를 이용한 효율적인 SRAM 테스트 기법)

  • Yoon, Doe-Hyun;Kim, Hong-Sik;Kang, Sung-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.12
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    • pp.50-59
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    • 2000
  • This paper presents a new SRAM testing method for various faults by monitoring dynamic power supply currents. The peak value of Iddt pulses when the transition write operation is performed, is prominently different from that of a fault free case. Using the observation, a new memory test algorithm is developed which consists of only write operations. The new test algorithm using dynamic power supply current testing, has length of 7n, where n is the number of cells in SRAMs. Compared to the previous March B algorithm, the test length has been reduced by 7/17, and can detect additional hard-to-detect faults.

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Integrated Operation of Power Conversion Module for DC Distribution System (직류 배전 시스템을 위한 전력 변환 모듈의 통합 운전)

  • Lee, Hee-Jun;Shin, Soo-Choel;Hong, Suk-Jin;Won, Chung-Yuen
    • The Transactions of the Korean Institute of Power Electronics
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    • v.19 no.3
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    • pp.240-248
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    • 2014
  • It is DC power that Output of renewable energy being recently developed and researched. Also, demand of DC power will expect to proliferate due to increase of digital load. Thus, DC distribution system providing high quality of power and reliability has emerged as a new distribution system. If the conventional distribution systems are substituted by proposed DC distribution system, the output of renewable energy can be connected with distribution systems under minimum power conversion. Therefore, in the event of connection with DC load, it can construct an efficient distribution system. In this paper, the integrated parallel operation of power conversion module for DC distribution system is proposed. Also, this paper proposed modularization of power conversion devices for DC distribution system and power control for parallel operation of large capacity system. DC distribution system consists of three power conversion modules such as AC/DC power conversion module 2 set, ESS module 1 set. DC distribution system controls suitable operation depending on the status of the DC power distribution system and load. Integrated operation of these systems is verified by simulation and experiment results.

Parallel Operation Method using New Cubic Equation Droop Control of Three-Phase AC/DC PWM Converter for DC Distribution Systems (DC배전용 3상 AC/DC PWM 컨버터의 새로운 3차방정식 Droop 제어를 적용한 병렬운전 기법)

  • Shin, Soo-Choel;Lee, Hee-Jun;Park, Yun-Wook;Hong, Seok-Jin;Won, Chung-Yuen
    • The Transactions of the Korean Institute of Power Electronics
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    • v.19 no.3
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    • pp.233-239
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    • 2014
  • This paper proposes that each converter supplies the power using the proposed droop control for the parallel operation of the converters. The proposed method is easy to increase the power as parallel system in DC distribution. By improving conventional droop-control method used in AC grid newly, a droop controller is designed to apply droop control in DC grid. And the control method of the proposed droop controller is explained particularly. In this paper, by applying the proposed control method to DC distribution system, propriety is verified through the simulation and the experiment.

Power Quality Compensating System Using Series Active Power Filter

  • Kwon Hyoung-Nam;Gho Jae-Sok;Choe Gyu-Ha;Kim Hong-Sung;Han Suk-Woo
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.606-610
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    • 2001
  • Voltage harmonics resulting from current harmonics produced by the nonlinear loads have become a serious problem in many systems. Moreover momentary interruptions and voltage sags are responsible for many of the power quality problems found in typical industrial plants. In this paper, proposed power system using series active power filter is not only harmonic compensation but also harmonic isolation between supply and load, and voltage regulation and unbalance compensation. The effectiveness of the proposed system is verified through computer simulations and experiments

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Design of Auxiliary Circuit to Reduce Loss of ZVT Interleaved Flyback Converter (ZVT 인터리브드 Flyback 컨버터의 손실 저감을 위한 보조 회로 설계)

  • Jung, Won-sang;Lee, Soon-ryung;Lee, Jong-young;Park, Yun-ji;Won, Chung-yuen;Yi, Je-Hyun
    • Proceedings of the KIPE Conference
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    • 2017.11a
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    • pp.43-44
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    • 2017
  • This paper presents design of auxiliary circuit to reduce loss of ZVT interleaved flyback converter. The ZVT interleaved converter using the conventional auxiliary circuit has a large conduction loss due to the constant circulating current in the auxiliary circuit. The auxiliary circuit proposed in this paper, which consists of the coupled inductor and DC-link capacitor, has linearly increasing or decreasing auxiliary current. Then, the conduction loss occurring in the auxiliary circuit is reduced. The validity of the proposed auxiliary circuit is verified with the prototype of 500W.

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LVRT Scheme for Doubly Fed Induction Generator Systems Based on Flux Tracking Method (자속 추종을 통한 DFIG 시스템의 LVRT 기법)

  • Park, Sun-Young;Chun, Yeong-Han;Lee, Dong-Myung
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.8
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    • pp.1059-1065
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    • 2013
  • Doubly Fed Induction Generator(DFIG) systems occupy the largest proportion of worldwide wind energy generation market. DFIG systems are very sensitive to grid disturbances especially to voltage dips due to the structure of the stator connected to grid. In the past, when a grid fault occurs generators are separated from grid(trip method) in order to protect the systems. Nowadays, due to the growing penetration level of wind power, many countries have made some requirements that wind turbines are required to have Low Voltage Ride Through(LVRT) capability during grid faults. In this paper, a flux tracking LVRT control strategy based on system modeling equations is proposed. The validity of the proposed strategy is verified through computer simulations.