• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.2C
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• pp.173-177
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• 2008

In this paper, we improve performance of Low Density Parity Check (LDPC) codes with adding a large number of short cycles. Short cycles, especially cycles of length 4, degrade performance of LDPC codes if the standard BP (Belief Propagation) decoding is used. Therefore current researches have focused on removing cycles of length 4 for designing good performance LDPC codes. We found that a large number of cycles of length 4 improve performance of LDPC codes if a modified BP decoding is used. We present the modified BP decoding algorithm for LDPC codes with a large number of short cycles. We show that the modified BP decoding performance of LDPC codes with a large number of short cycles is better than the standard BP decoding performance of LDPC codes designed by avoiding short cycles.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.14-15
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• 2008

In this paper, a new iterative decoding of LDPC codes is proposed. The decoding is based on the posteriori probability of each belief propagation (BP) decoding and an additional postprocessing, that is, erasure decoding of LDPC codes. It turned out that the new method consistently improves the decoding performance on various classes of LDPC codes. For example it removes the error floor of Margulis codes effectively.

• Journal of Communications and Networks
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• v.17 no.4
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• pp.351-361
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• 2015

In this paper, a new decoding scheme is proposed to improve the error correcting performance of low-density parity-check (LDPC) codes in high signal-to-noise ratio (SNR) region by using post-processing. It behaves as follows: First, a conventional LDPC decoding is applied to received LDPC codewords one by one. Then, we count the number of word errors in a predetermined number of decoded codewords. If there is no word error, nothing needs to be done and we can move to the next group of codewords with no delay. Otherwise, we perform a proper post-processing which produces a new soft-valued codeword (this will be fully explained in the main body of this paper) and then apply the conventional LDPC decoding to it again to recover the unsuccessfully decoded codewords. For the proposed decoding scheme, we adopt a simple product code structure which contains LDPC codes and simple algebraic codes as its horizontal and vertical codes, respectively. The decoding capability of the proposed decoding scheme is defined and analyzed using the parity-check matrices of vertical codes and, especially, the combined-decodability is derived for the case of single parity-check (SPC) codes and Hamming codes used as vertical codes. It is also shown that the proposed decoding scheme achieves much better error correcting capability in high SNR region with little additional decoding complexity, compared with the conventional LDPC decoding scheme.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.11C
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• pp.1025-1028
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• 2009

This paper presents upper bounds of Maximum Likelihood (ML) decoding performance of a few irregular LDPC codes using the simple bound and ML input output weight distributions and it is shown that contrary to general opinion that as block length becomes longer, BP decoding performance becomes simply closer to ML decoding performance, before peak degradation, as block length becomes longer, BP decoding performance falls behind ML decoding performance more and after peak degradation, general opinion holds.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.7C
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• pp.594-597
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• 2010

This paper estimates belief-propagation (BP) decoding performance of moderate-length irregular low-density parity-check (LDPC) codes with sphere bounds. We note that for moderate-length($10^3{\leq}N{\leq}4\times10^3$) irregular LDPC codes, BP decoding performance, which is much worse than maximum likelihood (ML) decoding performance, is well matched with one of loose upper bounds, i.e., sphere bounds. We introduce the sphere bounding technique for particular codes, not average bounds. The sphere bounding estimation technique is validated by simulation results. It is also shown that sphere bounds and BP decoding performance of irregular LDPC codes are very close at bit-error-rates (BERs) $P_b$ of practical importance($10^{-5}{\leq}P_b{\leq}10^{-4}$).

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.12C
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• pp.1143-1149
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• 2006

In this paper, the modified iterative decoding algorithm[8] by partitioning check nodes is applied to low-density parity-check(LDPC) codes in IEEE 802.16e standards, which gives us the improvement for convergence speed of decoding. Also, the new method of check node partitioning which is suitable for decoding of the LDPC codes in IEEE 802.16e system is proposed. The improvement of convergence speed in decoding reduces the number of iterations and thus the computational complexity of the decoder. The decoding method by partitioning check nodes can be applied to the LDPC codes whose decoder cannot be implemented in the fully parallel processing as an efficient sequential processing method. The modified iterative decoding method of LDPC codes using the proposed check node partitioning method can be used to implement the practical decoder in the wireless communication systems.

• IEIE Transactions on Smart Processing and Computing
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• v.6 no.3
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• pp.210-219
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• 2017

This paper proposes a modified min-max algorithm (MMMA) for nonbinary quasi-cyclic low-density parity-check (NB-QC-LDPC) codes and an efficient parallel block-layered decoder architecture corresponding to the algorithm on a graphics processing unit (GPU) platform. The algorithm removes multiplications over the Galois field (GF) in the merger step to reduce decoding latency without any performance loss. The decoding implementation on a GPU for NB-QC-LDPC codes achieves improvements in both flexibility and scalability. To perform the decoding on the GPU, data and memory structures suitable for parallel computing are designed. The implementation results for NB-QC-LDPC codes over GF(32) and GF(64) demonstrate that the parallel block-layered decoding on a GPU accelerates the decoding process to provide a faster decoding runtime, and obtains a higher coding gain under a low $10^{-10}$ bit error rate and low $10^{-7}$ frame error rate, compared to existing methods.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.5 no.3
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• pp.164-168
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• 2012

LDPC decoder architectures are generally classified into serial, parallel and partially parallel architectures. Conventional method of LDPC decoding in general give rise to a large number of computation operations, mass power consumption, and decoding delay. It is necessary to reduce the iteration numbers and computation operations without performance degradation. This paper studies Horizontal Shuffle Scheduling (HSS) algorithm. In the result, number of iteration is half than conventional algorithm without performance degradation. Finally, this paper present design methodology of high-speed LDPC decoder and confirmed its throughput is up to about 600Mbps.

• Smart Media Journal
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• v.2 no.2
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• pp.39-43
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• 2013

In this paper, we suggest a new technique for WPC parity-check matrix (H-matrix) generation and a corresponding decoding process. The key idea is to construct WPC H-matrix by using a convolutional encoder. It is easy to have many different coderates from a mother code with convolutional codes. However, it is difficult to have many different coderates with LDPC codes. Constructing LDPC Hmatrix based on a convolutional code can easily bring the advantage of convolutional codes to have different coderates. Moreover, both LDPC and convolutional decoding algorithms can be applied altogether in the decoding part. This process prevents the performance degradation of short-length WPC code.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.59 no.1
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• pp.53-57
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• 2010

Low-density parity-check (LDPC) codes with belief-propagation (BP) algorithm achieve a remarkable performance close to the Shannon limit at reasonable decoding complexity. Conventionally, each iteration in decoding process contains two steps, the horizontal step and the vertical step. In this paper, an efficient implementation of the adaptive offset min-sum (AOMS) algorithm for decoding LDPC codes using the single-step method is proposed. Furthermore, the performances of the AOMS algorithm compared with belief-propagation (BP) algorithm are investigated. The algorithms using the single-step method reduce the implementation complexity, speed up the decoding process and have better efficiency in terms of memory requirements.