• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.11
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• pp.3-8
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• 2012

Two-dimensional product code has been studied for correcting burst errors on the storage systems. An RS-LDPC product code consists of an RS code in horizontal direction and an LDPC code in vertical direction. First, we detect the position of burst errors by using RS code, then LDPC code corrects the errors by using the burst error positions. In storage system, long burst errors are occurred by various reason. So, we need a strong code for correcting the long burst errors. RS-LDPC product code is good for long burst errors. However, as the storage density grows the length of the burst errors will be longer. Thus, we propose an LDPC-LDPC product code, it is strong for correcting the very long burst errors. Also, the proposed LDPC-LDPC product code performs better than RS-LDPC product code when the random errors are occurred, because a row direction LDPC code performs better than row direction RS code.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.2C
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• pp.173-177
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• 2008

In this paper, we improve performance of Low Density Parity Check (LDPC) codes with adding a large number of short cycles. Short cycles, especially cycles of length 4, degrade performance of LDPC codes if the standard BP (Belief Propagation) decoding is used. Therefore current researches have focused on removing cycles of length 4 for designing good performance LDPC codes. We found that a large number of cycles of length 4 improve performance of LDPC codes if a modified BP decoding is used. We present the modified BP decoding algorithm for LDPC codes with a large number of short cycles. We show that the modified BP decoding performance of LDPC codes with a large number of short cycles is better than the standard BP decoding performance of LDPC codes designed by avoiding short cycles.

• Smart Media Journal
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• v.2 no.2
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• pp.39-43
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• 2013

In this paper, we suggest a new technique for WPC parity-check matrix (H-matrix) generation and a corresponding decoding process. The key idea is to construct WPC H-matrix by using a convolutional encoder. It is easy to have many different coderates from a mother code with convolutional codes. However, it is difficult to have many different coderates with LDPC codes. Constructing LDPC Hmatrix based on a convolutional code can easily bring the advantage of convolutional codes to have different coderates. Moreover, both LDPC and convolutional decoding algorithms can be applied altogether in the decoding part. This process prevents the performance degradation of short-length WPC code.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.3A
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• pp.207-213
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• 2006

In this paper, we reduce the computational complexity to find the minimum distance of RA codes by searching only valid codewords using repetition part. Since LDPC codes have repetition part like RA codes, we also apply this algorithm for computing the minimum distance of LDPC codes. The minimum distance dominates the code performance at high signal-to-noise ratios(SNRs) and in turn allows an estimate of the error floor. The proposed algorithm computes the minimum distance without any constraint on code structures. The minimum distances of LDPC codes and RA codes with large interleavers of practical importance are computed and used to obtain the error floor, which is compared with the performance of the iterative decoding.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.2C
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• pp.123-129
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• 2006

In this paper, we concentrate on reducing the complexity for efficient encoder. We design structural LDPC code using circulant matrix and permutation matrix and eIRA code. It is possible to design low complex encoder by using shift register and differential encoder and interleaver than general LDPC encoder that use matrix multiplication operation. The code designed by this structure shows similar performance as random code. And the proposed codes can considerably reduce a number of XOR gates.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.48 no.2
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• pp.35-39
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• 2011

Error correcting codes with easy variability in code rate and codeword length in addition to powerful error correcting capability are required for present and future mobile multimedia communication systems. And low complexity is also needed for the compact mobile terminals. In general, the irregular random LDPC(low-density parity-check) code is known to have the superior performance among various LDPC codes. But it has inefficiency since the various parity check matrices for various services should be stored for encoding and decoding. The structured LDPC codes which can easily provide various rates and lengths are studied recently. Therefore, the flexibility, memory size, and error performance of various structured LDPC codes are compared and analyzed in this paper. And the most appropriate structured LDPC code is also suggested.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2010.11a
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• pp.282-284
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• 2010

1962년 Gallager에 의해서 처음 제안된 LDPC 부호는 터보부호(turbo codes)와 마찬가지로 Shannon의 채널용량 한계(channel capacity limit)에 가까운 성능을 보였지만 당시 기술력으로 구현이 불가능한 복잡도로 인해 오랫동안 잊혀져왔다. 1995년 Mackay 와 Neal은 이를 재발견하였고 간단한 확률적 복호법을 이용하여 LDPC 부호의 성능이 매우 우수함을 보였다. 또한 1997년 Mackay는 q>2일 때 LDPC 부호를 GF(q)상에서 구성할 경우에 성능이 더 좋아짐을 보였다. 본 논문에서는 이진 bit로 구성된 같은 길이의 정보 비트(information bit)를 통해 16-QAM 변조를 사용했을시 Binary LDPC 부호와 Non Binary LDPC 부호의 성능을 비교 분석하고, 최적의 성능을 가지는 LDPC 부호의 설계에 대해 제안한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.10C
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• pp.1363-1369
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• 2004

LDPC(Low Density Parity Check) codes are described by bipartite graphs with bit nodes and parity-check nodes. Tanner derived minimum distance bounds of the regular LDPC code in terms of the eigenvalues of the associated adjacency matrix. In this paper we generalize the Tanner's results. We derive minimum distance bounds applicable to both regular and blockwise-irregular LDPC codes. The first bound considers the relation between bit nodes in a minimum-weight codeword, and the second one considers the connectivity between parity nodes adjacent to a minimum-weight codeword. The derived bounds make it possible to describe the distance property of the code in terms of the eigenvalues of the associated matrix.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.1A
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• pp.34-42
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• 2012

Low density parity check (LDPC) code is widely used, since it shows superior performance close to Shannon limit and its decoding complexity is lower than turbo code. Recently, it is used as a channel code to decode Wyner-Ziv frames in distributed video coding (DVC) system. In this paper, we propose an efficient method to design the parity check matrix H of LDPC codes. In order to apply LDPC code to DVC system, the LDPC code should have rate compatibility. Thus, we also propose a method to merge check nodes of LDPC code to attain the rate compatibility. LDPC code is designed using ACE algorithm and check nodes are merged for a given code rate to maximize the error correction capability. The performance of the designed LDPC code is analyzed extensively by computer simulations.

• The Journal of the Korea institute of electronic communication sciences
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• v.12 no.4
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• pp.569-574
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• 2017

In order to transmit information in a channel environment in which noise exists, a coding technique of information is required. One of the coding techniques used for error detection and correction close to the Shannon limit is Low Density Parity Code(LDPC). LDPC and decoding characteristic features by Sum-product algorithm are matched for the performance to Turbo Code, RA(Repeat Accumulate) code, in case of very long code length of LDPC surpass their performance. This paper explains LDPC coding scheme of image data and decoding scheme, implements LDPC decoder in FPGA.