• Title/Summary/Keyword: LC circuit

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Dynamic Pixel Models for a-Si TFT-LCD and Their Implementation in SPICE

  • Wang, In-Soo;Lee, Gi-Chang;Kim, Tae-Hyun;Lee, Won-Jun;Shin, Jang-Kyoo
    • ETRI Journal
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    • v.34 no.4
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    • pp.633-636
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    • 2012
  • A dynamic analysis of an amorphous silicon (a-Si) thin film transistor liquid crystal display (TFT-LCD) pixel is presented using new a-Si TFT and liquid crystal (LC) capacitance models for a Simulation Program with Integrated Circuit Emphasis (SPICE) simulator. This dynamic analysis will be useful when predicting the performance of LCDs. The a-Si TFT model is developed to accurately estimate a-Si TFT characteristics of a bias-dependent gate to source and gate to drain capacitance. Moreover, the LC capacitance model is developed using a simplified diode circuit model. It is possible to accurately predict TFT-LCD characteristics such as flicker phenomena when implementing the proposed simulation model.

A Design of LC-tuned Sinusoidal VCOs Using OTA-C Active Inductors

  • Chung, Won-Sup;Son, Sang-Hee
    • Journal of IKEEE
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    • v.11 no.3
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    • pp.122-128
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    • 2007
  • Sinusoidal voltage-controlled oscillators (VCOs) based on Colpitts and Hartley oscillators are presented. They consist of a LC parallel-tuned circuit connected in a negative-feedback loop with an OTA-R amplifier and two diode limiters, where the inductor is simulated one realized with temperature-stable linear operational transconductance amplifiers (OTAs) and a grounded capacitor. Prototype VCOs are built with discrete components. The Colpitts VCO exhibits less than 1% nonlinearity in its current-to-frequency transfer characteristic from 4.2 to 21.7 MHz and ${\pm}$95 ppm/$^{\circ}C$ temperature drift of frequency over 0 to $70^{\circ}C$. The total harmonic distortion (THD) is as low as 2.92% with a peak-to-peak amplitude of 0.7 V for a frequency-tuning range of 10.8-32 MHz. The Hartley VCO has the temperature drift and THD of two times higher than those of the Colpitts VCO.

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New Energy Recovery Concept for AC PDP Sustaining Driver Using Current Injection Method (CIM)

  • Lee, Jun-Young;Kim, Jin-Sung;So, Myeong-Seop;Cho, Bo-Hyung
    • Journal of Power Electronics
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    • v.2 no.3
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    • pp.189-198
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    • 2002
  • New concept of energy recovery for plasma display panel (PDP) Is proposed. Different from conventional LC resonant sustaining drivers, the current built up before inverting the polarity of the panel electrodes is utilized to change the panel Polarity together with energy Previously charged in Panel capacitance. This operation Provides zero -voltage-switching of switches and reduction of EMI by rejecting the surge current when the sustain switches are turned on. The build-up current helps to reduce transition time of panel polarity and may produce more stable light waveforms. This method shows a desirable characteristic that the circuit loss is similar to that of series resonant type energy recovery circuit which is very effective method.

The Circuit Parameters Determination of Voltage-Sag Compensator (순간전압강하 보상기의 회로파라미터 설정)

  • Kim, Hong-Kwon;Lee, Eun-Woong;Lim, Su-Saeng;Kim, Jun-Ho;Jeon, Bok-Su
    • Proceedings of the KIEE Conference
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    • 2000.07b
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    • pp.795-797
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    • 2000
  • The analysis model of voltage-sag compensator is achieved in synchronous rotating coordinates. Inverter's LC filter and DC-link capacitor is designed in order to reduce THD of output voltages and LC filter's size And the circuit parameters of voltage-sag compensator is presented for 3-phase Customer.

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Development of an Electronic Ballast for 70W Ceramic Discharge Metal Halide Lamps with Step Down Converter (강압형 컨버터를 이용한 70W CDM 램프용 전자식 안정 기의 개발)

  • 김일권;길경석;김진모
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.7
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    • pp.1055-1061
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    • 2002
  • This paper deals with a design and fabrication of an electronic ballast for 70[W] ceramic discharge metal halide lamps. The proposed ballast is composed of a rectifier, an active power factor correction circuit (PFC), a half-bridge inverter, a LC resonant circuit and a microprocessor. The developed ballast also includes a specially designed time circuit which provides reignition signal of lamps. Running frequency of the ballast is .jet at 40[kHz] to avoid acoustic-resonance and flickering. From the experimental results, input power factor and efficiency of the ballast are estimated 99.8[%] and 93.1[%], respectively.

Development of an Electronic Ballast for 70W Ceramic Discharge Metal Halide Lamps with Step Down Converter (강압형 컨버터를 이용한 70W CDM 램프용 전자식 안정기의 개발)

  • 김일권;길경석;김진모
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2002.11a
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    • pp.435-439
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    • 2002
  • This paper describes a design and fabrication of an electronic ballast for 70[W] ceramic discharge metal halide lamps. The proposed ballast is composed of a rectifier, an active power factor correction circuit (PFC), a half-bridge inverter, a LC resonant circuit and a microprocessor. The developed ballast also includes a specially designed time circuit which provides reignition of lamps. Running frequency of the ballast is set at 40[kHz] to avoid acoustic-resonance and flickering. From the experimental results, input power factor and efficiency of the ballast are estimated 99.8[%] and 93.1[%)] respectively.

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Ultra Low Field Sensor Using GMI Effect in NiFe/Cu Wires

  • Kollu, Pratap;Kim, Doung-Young;Kim, Cheol-Gi
    • Journal of Magnetics
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    • v.12 no.1
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    • pp.35-39
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    • 2007
  • A highly sensitive magnetic sensor using the Giant MagnetoImpedance effect has been developed. The sensor performance is studied and estimated. The sensor circuitry consists of a square wave generator (driving source), a sensing element in a form of composite wire of a 25 $\mu$m copper core electrodeposited with a thin layer of soft magnetic material ($Ni_{80}Fe_{20}$), and two amplifier stages for improving the gain, switching mechanism, scaler circuit, an AC power source driving the permeability of the magnetic coating layer of the sensing element into a dynamic state, and a signal pickup LC circuit formed by a pickup coil and an capacitor. Experimental studies on sensor have been carried out to investigate the key parameters in relation to the sensor sensitivity and resolution. The results showed that for high sensitivity and resolution, the frequency and magnitude of the ac driving current through the sensing element each has an optimum value, the resonance frequency of the signal pickup LC circuit should be equal to or twice as the driving frequency on the sensing element, and the anisotropy of the magnetic coating layer of the sensing wire element should be longitudinal.

Force Commutated Circuit for Driving The Load Commutated Current Source Inverter (부하전류식(負荷轉流式) 전류형(電流型) 인버터를 구동(驅動)하기 위한 강제전류회로(强制轉流回路))

  • Chung, Y.T.;Lee, S.Y.;Soh, Y.C.;Lee, J.W.
    • Proceedings of the KIEE Conference
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    • 1993.07b
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    • pp.731-735
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    • 1993
  • When induction motor is driven with a load commutated inverter, the output part of the inverter must be capacitive. But, in order to be a good load commutation at the low speed range, very large capacitor or force commutated circuit must be used regarding the capacity of motor. This paper proposed the force commutated circuit for driving the motor in case of the installation of capacitor which can be capable of load commutation at the rating speed. The force commutated circuit is operated by the LC resonant circuit, auxiliary source and SCR, and also composed of the commutation circuit which control the interval of the inverse voltage across the inverter.

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40Gb/s Clock and Data Recovery Circuit with Multi-phase LC PLL in CMOS $0.18{\mu}m$ (LC형 다중 위상 PLL 이용한 40Gb/s $0.18{\mu}m$ CMOS 클록 및 데이터 복원 회로)

  • Ha, Gi-Hyeok;Lee, Jung-Yong;Kang, Jin-Ku
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.4
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    • pp.36-42
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    • 2008
  • 40Gb/s CMOS Clock and Data Recovery circuit design for optical serial link is proposed. The circuit generates 8 multiphase clock using LC tank PLL and controls the phase between the clock and the data using the $2{\times}$ oversampling Bang-Bang PD. 40Gb/s input data is 1:4 demultiplexed and recovered to 4 channel 10Gb/s outputs. The design was progressed to separate the analog power and the digital power. The area of the chip is $2.8{\times}2.4mm^2$ for the inductors and the power dissipation is about 200mW. The chip has been fabricated using 0.18um CMOS process. The measured results show that the chip recovers the data up to 9.5Gb/s per channel(Equivalent to serial input rate of up to 38Gb/s).

A Fully-integrated High Performance Broadb and Amplifier MMIC for K/Ka Band Applications (K/Ka밴드 응용을 위한 완전집적화 고성능 광대역 증폭기 MMIC)

  • Yun Young
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.7
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    • pp.1429-1435
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    • 2004
  • In this work, high performance broadband amplifier MMIC including all the matching and biasing components, and electrostatic discharge (ESD) protection circuit was developed for K/Ka band applications. Therefore, external biasing or matching components were not required for the operation of the MMIC. STO (SrTiO3) capacitors were employed to integrate the DC biasing components on the MMIC, and miniaturized LC parallel ESD protection circuit was integrated on MMIC, which increased ESD breakdown voltage from 10 to 300 V. A pre-matching technique and RC parallel circuit were used for the broadband design of the amplifier MMIC. The amplifier MMIC exhibited good RF performances and good stability in a wide frequency range. The chip size of the MMICs was $1.7{\pm}0.8$ mm2.