• JSTS:Journal of Semiconductor Technology and Science
• /
• 제9권4호
• /
• pp.192-197
• /
• 2009

This paper presents the design and measurement of a 2.4/5.2-GHz dual band VCO with a balanced frequency doubler in $0.18\;{\mu}m$ CMOS process. The topology of a 2.4 GHz VCO is a cross-coupled VCO with a LC tank and the frequency of the VCO is doubled by a frequency balanced doubler for a 5.2 GHz VCO. The gate bias matching network for class B operation in the balanced doubler is adopted to obtain as much power at 2nd harmonic output as possible. The average output powers of the 2.4 GHz and 5.2 GHz VCOs are -12 dBm and -13 dBm, respectively, the doubled VCO has fundamental harmonic suppression of -25 dB. The measured phase noises at 5 MHz frequency offset are -123 dBc /Hz from 2.6 GHz and -118 dBc /Hz from 5.1 GHz. The total size of the dual band VCO is $1.0\;mm{\times}0.9\;mm$ including pads.

• IEIE Transactions on Smart Processing and Computing
• /
• 제4권3호
• /
• pp.158-162
• /
• 2015

A low phase noise CMOS voltage controlled oscillator(VCO) for multi-band/multi-standard RF Transceivers is presented. For both wide tunability and low phase noise characteristics, Hybrid inductor which uses both bondwire inductor and planar spiral inductor in the same area, is proposed. This approach reduces inductance variation and presents high quality factor without custom-designed single-turn inductor occupying large area, which improves phase noise and tuning range characteristics without additional area loss. An LC VCO is designed in a 0.13um CMOS technology to demonstrate the hybrid inductor concept. The measured phase noise is -121dBc/Hz at 400KHz offset and -142dBc/Hz at 3MHz offset from a 900MHz carrier frequency after divider. The tuning range of about 28%(3.15 to 4.18GHz) is measured. The VCO consumes 7.5mA from 1.3V supply and meets the requirements for GSM/EDGE and WCDMA standard.

• 산업기술연구
• /
• 제29권B호
• /
• pp.101-105
• /
• 2009

A 1.571GHz LC VCO with optimized spiral inductor for GPS receiver is designed in 130nm CMOS process. The phase noise of the VCO has been reduced the use of high Q inductor and on chip filter. It has phase noise of -91dBc/Hz, -111dBc/Hz, and -131dBc/Hz at 10kHz, 100kHz, and 1MHz offset frequencies from the carrier, respectively. This VCO consumes 2mA from a 0.6V supply.

• 전기전자학회논문지
• /
• 제19권4호
• /
• pp.465-471
• /
• 2015

An LC-tuned sinusoidal voltage-controlled oscillator (VCO) using temperature-stable linear operational transconductance amplifiers (OTAs) is presented. Its architecture is based on Hartley oscillator configuration, where the inductor is active one realized with two OTAs and a grounded capacitor. Two diode limiters are used for limiting amplitude. A prototype oscillator built with discrete components exhibits less than 3.1% nonlinearity in its current-to-frequency transfer characteristic from 1.99 MHz to 39.14 MHz and $220ppm/^{\circ}C$ frequency stability to the temperature drift over 0 to $75^{\circ}C$. The total harmonic distortion (THD) is as low as 4.4 % for a specified frequency-tuning range. The simulated phase noise of the VCO is about -108.9 dBc/Hz at 1 MHz offset frequency in frequency range of 0.4 - 46.97 MHz and property of phase noise of VCO is better than colpitts-VCO.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2001년도 춘계학술대회 논문집 유기절연재료 전자세라믹 방전플라즈마 연구회
• /
• pp.55-58
• /
• 2001

In this paper, we present the results of the design and fabrication of the VCO(Voltage controlled Oscillator) using RF circuit simulator GENESYS and electromagnetic field simulator EMpower Frequency range is fabricated VCO is 850 MHz ~ 950 MHz, which is used Colpitts Circuit. the fabricated VCO is consisted of resonator, oscillator and MSL(Microstrip Line) is used in LC tuning circuit.(operated by negative feedback) MSL(Microstrip Line), Varactor(Plastic package), low noise TR(SOT-23), chip inductor(1608), chip capacitor(1005), chip resistance(1005). 1005 type is used for sample fabrication of VCO. In the fabrication process, circuit pattern is screen printed on the alumina substrates of over 99.9% purity. Center frequency of the sample VCO is 850MHz at $V_T=1.5V$, while the simulated value was 1.0GHz at $V_T=1.5V$. Variable frequency range of the sample is 860~950MHz in contrast to the 1068~1100MHz of the simulated values.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2001년도 춘계학술대회 논문집 유기절연재료 전자세라믹 방전플라즈마 연구회
• /
• pp.153-156
• /
• 2001

In this paper, we present the results of the design and fabrication of the VCO(Voltage controlled Oscillator) using RF circuit simulator GENESYS and electromagnetic field simulator EMpower Frequency range is fabricated VCO is 850 MHz ~ 950 MHz, which is used Colpitts Circuit. the fabricated VCO is consisted of resonator, oscillator and MSL(Microstrip Line) is used in LC tuning circuit.(operated by negative feedback) MSL(Microstrip Line), Varactor(Plastic package), low noise TR(SOT-23), chip inductor(1608), chip capacitor(1005), chip resistance(1005). 1005 type is used for sample fabrication of VCO. In the fabrication process, circuit pattern is screen printed on the alumina substrates of over 99.9% purity. Center frequency of the sample VCO is 850MHz at $V_T$=1.5V, while the simulated value was 1.0GHz at $V_T$=1.5V. Variable frequency range of the sample is 860~950MHz in contrast to the 1068~1100MHz of the simulated values.

• 전자공학회논문지
• /
• 제51권3호
• /
• pp.55-60
• /
• 2014

고속 통신을 위해서 0.11um CMOS 공정을 사용하여 40GHz 전압 제어 발진기 (VCO : Voltage Controlled Oscillatior)를 제작했다. 밀리미터 웨이브 대역에서 동작하는 VCO는 높은 성능을 얻기 위하여 스마트 바이어스 테크닉을 사용하였고 스파이럴 형태의 인덕터와 출력버퍼를 추가하여 LC형 구조로 설계했다. 제안하는 VCO의 동작범위는 34~40GHz이며, 이 주파수 대역은 밀리미터 웨이브 통신 시스템에 적합하다. VCO의 측정결과 -16dBm의 출력파워와 16%의 동작범위, 38GHz 중심주파수에서 -100.33dBc/Hz(@1MHz)의 위상잡음을 갖는다. 또한 1.2V 전원에서 PAD를 포함한 전체 소모전력은 16.8mW이다. VCO의 성능을 비교할 수 있는 FOMT의 값은 -183.3dBc/Hz로 이전의 VCO에 비해 우수한 성능을 확인했다.

• 대한전자공학회논문지SD
• /
• 제40권8호
• /
• pp.598-609
• /
• 2003

본 논문에서는 CMOS IF PLL 주파수합성기를 설계하였다. 설계된 주파수합성기는 칩 외부에 LC 공진 회로를 원하는 값에 맞게 바꿈으로써 다양한 중간 주파수에서 동작 가능하다. VCO는 자동진폭조절 기능을 갖도록 설계하여 LC 공진회로의 Q-factor에 무관하게 일정한 진폭의 출력을 발생한다. 설계된 주파수분주기는 8/9 또는 16/17 dual-modulus prescaler를 포함하며, 다양한 응용분야에 적용 가능하도록 외부 직렬데이터에 의해 동작 주파수를 프로그램할 수 있도록 하였다. 설계된 회로는 0.35㎛ n-well CMOS 공정을 사용하여 제작되었으며, 제작된 IC의 성능을 측정한 결과 260㎒의 동작주파수에서 위상잡음은 -114dBc/Hz@100kHz 이고 lock time은 300㎲보다 작다. 설계된 회로는 3V의 전원전압에서 16mW의 전력을 소모하며, 칩 면적은 730㎛×950㎛이다.

• 전자공학회논문지 IE
• /
• 제45권4호
• /
• pp.1-6
• /
• 2008

본 연구에서는 MB-OFDM UWB 응용을 위하여 복잡도를 낮추고 전력소모를 줄인 고속 스위칭 주파수 합성기를 다룬다. 제안된 구조는 밴드 그룹 1 주파수를 생성하기 위하여 3960 MHZ LC VCO, 528 MHz 링 오실레이터, 수동 믹서 및 LC-조정 Q-향상 BPF를 사용한다. 인접 채널 제거비는 3432 MHz 신호에서 -40 dBc 이하, 그리고 4488 MHz 신호에서 -44 dBc 이하의 특성을 확인하였다. 요구되는 출력 신호를 얻기 위하여 SCL 구조의 고속 스위칭 MUX를 사용하여 2.2 ns 이하의 밴드 스위칭 시간을 얻었다. 전체 전력 소모는 1.8 V 전원을 사용하여 47.9 mW이다.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제8권4호
• /
• pp.295-301
• /
• 2008

Recently, the demand on mm-wave (millimeter-wave) applications has increased dramatically. While circuits operating in the mm-wave frequency band have been traditionally implemented in III-V or SiGe technologies, recent advances in Si MOSFET operation speed enabled mm-wave circuits realized in a Si CMOS technology. In this work, a 58 GHz CMOS LC cross-coupled VCO (Voltage Controlled Oscillator) was fabricated in a $0.13-{\mu}m$ Si RF CMOS technology. In the course of the circuit design, active device models were modified for improved accuracy in the mm-wave range and EM (electromagnetic) simulation was heavily employed for passive device performance predicttion and interconnection parasitic extraction. The measured operating frequency ranged from 56.5 to 58.5 GHz with a tuning voltage swept from 0 to 2.3 V. The minimum phase noise of -96 dBc/Hz at 5 MHz offset was achieved. The output power varied around -20 dBm over the measured tuning range. The circuit drew current (including buffer current) of 10 mA from 1.5 V supply voltage. The FOM (Figure-Of-Merit) was estimated to be -165.5 dBc/Hz.