• 제목/요약/키워드: Isolation circuit

검색결과 249건 처리시간 0.023초

인버터의 직류링크 전압 검출 및 궤환을 위한 절연앰프 회로 (Isolation Amplifier Circuits for Sensing and Feedback of the Inverter DC-Link Voltage)

  • 김경서
    • 전력전자학회논문지
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    • 제19권6호
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    • pp.522-529
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    • 2014
  • This study proposes an isolation amplifier circuit for the sensing and feedback of inverter DC-link voltage, which is inevitable for the precise control of inverter output voltage. The isolation amplifier consists of a pulse-width modulator and a pulse transformer with dual secondary windings. The accuracy of the proposed circuit depends on the precise matching of filter parameters in dual secondary circuits. The influences of parameter inaccuracy on the amplifier performances are analyzed. A modified circuit is proposed to reduce the dependency on filter parameters. The validity of the proposed method is verified through simulation and experiment.

Drive Circuit of 4-Level Inverter for 42V Power System

  • Park, Yong-Won;Sul, Seung-Ki
    • KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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    • 제11B권3호
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    • pp.112-118
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    • 2001
  • In the near future, the voltage of power system for passenger vehicle will be changed to 42V from existing 14V./ Because of increasing power and voltage ratings used in the vehicle the motor drive system has high switching dv/dt and it generates electromagnetic interference (EMI) To solve these problems multi-level inverter system may be used The feature of multi-level inverter is the output voltage to be synthesized from several levels of voltage Because of this feature high switching dv/dt and EMI can be reduced in the multi-level inverter system But as the number of level is increased manufacturing cost is getting expensive and system size is getting large. Because of these disadvantages the application of multi-level inverter has been restricted only to high power drives. The method to reduce manufacturing cost and system size is to integrate circuit of multi-level inverter into a few chips But isolated power supply and signal isolation circuit using transformer or opto-coupler for drive circuit are obstacles to implement the integrated circuit (IC) In this paper a drive circuit of 4-level inverter suitable for integration to hybrid or one chip is proposed In the proposed drive circuit DC link voltage is used directly as the power source of each gate drive circuit NPN transistors and PNP transistors are used to isolate to transfer the control signals. So the proposed drive circuit needs no transformers and opto-couplers for electrical isolation of drive circuit and is constructed only using components to be implemented on a silicon wafer With th e proposed drive circuit 4- level inverter system will be possible to be implemented through integrated circuit technology Using the proposed drive circuit 4- level inverter system is constructed and the validity and characteristics of the proposed drive circuit are proved through the experiments.

GaAs MMIC상에서 주기적 접지구조를 가지는 결합선로의 절연특성에 관한 연구 (A Study on Characteristics of Coupled Line Employing Periodical Ground Structure on GaAs MMIC)

  • 김세호;강석엽;윤영
    • Journal of Advanced Marine Engineering and Technology
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    • 제33권1호
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    • pp.159-165
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    • 2009
  • In this study, using a periodical ground structure(PGS) on GaAs monolithic microwave integrated circuit(MMIC), transmission line with a high isolation characteristic was developed for application to compact signal/bias lines of highly integrated MMIC. And the origin of the high isolation characteristic was theoretically investigated. The high isolation characteristic was originated from a resonance between adjacent microstrip lines employing PGS. With only a spacing of $20{\mu}m$, the coupled microstrip line employing PGS showed an isolation value of -47 dB at 60 GHz. The frequency range for high isolation was easily controlled by changing the PGS structure. Above results indicate that microstrip lines employing PGS are very useful for application to compact signal/bias lines of highly integrated MMIC requiring a high isolation characteristics between lines. In addition, equivalent circuit employing closed-form equation for the coupled line with PGS was also extracted.

스마트카드의 인증을 위한 지문인식 회로 설계 (Circuit Design of Fingerprint Authentication for Smart Card Application)

  • 정승민;김정태
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 2003년도 춘계종합학술대회
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    • pp.249-252
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    • 2003
  • 본 논문에서는 반도체 방식의 직접 터치식 capacitive type 지문인식센서의 신호처리를 위한 회로를 제안하였다. 센서로부터의 capacitance의 변화를 전압의 신호로 전환하기 위해서 charge-sharing 방식의 회로를 적용하였다. 지문센서 감도저하의 가장 큰 원인인 sensor plate에 존재하는 parasitic capacitance를 제거하여 ridge와 valley 사이의 전압차를 향상시키기 위하여 기존과는 다른 아날로그 버퍼회로를 설계 적용하였다. 센서 하부회로와의 isolation 대책을 통하여 ESD 및 노이즈방지를 위한 설계를 실시하였다. 제안된 신호처리회로는 128$\times$144 pixel 규모의 회로로 구현되었다. 본 설계회로는 향후 생체인식을 이용한 정보보호용 지문인식 시스템에 응용될 수 있으리라 본다.

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출력포트 사이의 물리적 격리도를 향상시킨 비대칭분배기 (An Unequal Divider with Enhanced Physical Isolation Between Output Ports)

  • 김영;윤영철
    • 한국항행학회논문지
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    • 제18권4호
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    • pp.359-363
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    • 2014
  • 본 논문은 출력 포트 사이의 물리적인 분리와 전기적 격리도를 개선시킨 비대칭 분배기기의 설계와 성능을 나타낸 것이다. 이 분배기는 입력 포트와 연결된 두 개의 ${\lambda}/4$ 전송선로의 중앙에 격리소자 저항 $18{\Omega}$과 캐패시터 0.7 pF를 직렬로 연결하여 출력 포트 사이에 격리도를 높였고, 출력 포트가 다른 회로에 연결이 쉽도록 하는 설계 방법을 제시하였다. 이러한 설계는 출력포트의 격리도를 물리적으로 향상시켜주며, 이 분배기와 다른 회로가 연결 될 때 별도의 전송선로가 필요 없이 연결할 수 있는 특징을 갖고 있다. 이러한 특성을 확인하기 위하여 중심 주파수 2 GHz에서 4:1 비대칭 분배기를 설계하였고 측정된 결과는 반사계수가 17 dB 이상, 삽입손실은 1.5 dB 와 7.7 dB, 그리고 격리도는 18 dB 이상 특성을 얻었다. 이러한 전기적 특성은 시뮬레이션 결과와 일치함을 확인하였다.

차단기 정보를 이용한 계통의 분리 상태 인식의 룰-베이스적 접근 (A Rule-based Approach for the recognition of system isolation state using information on circuit breakers)

  • 박영문;이정호
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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    • pp.841-842
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    • 1988
  • For determination of black-out area and restoration area by an expert system for fault section estimation and power system restoration using information from circuit breakers, it is necessary that the recognition of system isolation state and a method of finding the change of system isolation state by the state transition of breakers in isolated system. This paper presents a method of resolving the above problem by rule-based approach.

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Utililty-Interfaced High-Frequency Flyback Transformer Linked Sinewave Pulse Modulated Inverter for a Small Scale Renewable Energy Conditioner

  • Chandhaket, Srawouth;Koninish, Yoshihiro;Nakaoka, Mutsou
    • Journal of Power Electronics
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    • 제2권2호
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    • pp.112-123
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    • 2002
  • This paper presents a novel prototype of the utility AC power interfaced soft-switching sinewave pulse modulated inverter using the high-frequency flyback for the small scale distributed renewable energy power conditioner. The proposed cricuit with a high-frequency isolation link has a funtion of electrical isolation, which is more cost-effective and reliable for the small-scale distributed renwal energy utilization system from a safety point of riew. The discontinuous conduction mode(DCM) operation of the high-frequency flyback transformer is adopted to establish a simple and low-cost circuit configuration and control scheme. For the simplicity, the circuit operating principle is described on the basis of the modified conventional full bridge inverter, whitch is the typical conventional high-frequency full-bridge inverter employing the high requency flyback transformer to eanble the effictive function of the electrical isolation. Than, the new circuit topology of the unility-interfaced soft-switching sinewave pulse modulated inverter using IGBTs is proposed. The proposed cricuit topology is additionally composed of the auxiliary power regenerating snubber cricuits, which are also mathematically analyzed for the parameter desigen settings. Finally, the performance of the propose inverter is evaluated on the basis of computer-aid simulation. It is noted that the sinewave pulse modulated output current of the inverter is synchronous to the AC main voltage.

Self-Power Gating Technique For Low Power Asynchronous Circuit

  • Mai, Kim-Ngan Thi;Vo, Huan Minh
    • 전기전자학회논문지
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    • 제22권3호
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    • pp.548-557
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    • 2018
  • In this paper, Asynchronous Self-Power Gating technique (ASPG) is used to reduce consumption power in asynchronous digital watch application. The power gating control signal is automatically generated by internal system operation characteristics instead of using replica circuit delay or four-phase handshaking protocol. Isolation cell is designed to insert it between power gating domain and normal operation domain. By using self-power gating circuit, asynchronous digital watch application consumes very low power and maintains data during sleep mode. The comparison results show the proposed ASPG technique saves leakage power up to 40.47% and delay time is reduced to 71% compared to the conventional circuit.

128 채널 심장전기도 전치 증폭기의 설계 (The Design of 128 Channels Cardiac-Activation Pre-Amplifier)

  • 유선국;장병철;정동일;한영오
    • 대한전기학회논문지:시스템및제어부문D
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    • 제50권11호
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    • pp.550-556
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    • 2001
  • The computerized cardiac analysis system, which acquires and analyzes the electrical activation signal propagating along the surface of the heart, is indispensible equipment for the open heart surgery and electrical cardiac study. In this paper, the design requirement and the electrical circuit analysis are performed to construct the multi-channel cardiac activation pre-amplifier necessary for a signal conditioning circuit. The general 64 channel configuration is expanded into 128 channels to enhance the spatial resolution on the mapped surface of the heart. The 128 channels pre-amplifier consists of input circuit, differential amplifier, right leg driven circuit and isolation part. It has distinct features; high voltage protection, leakage current limitation, isolation and the maximization of common mode rejection ratio with respect to the half-cell potential difference due to different electrode materials. The final pre-amplifier circuit is assembled with 8 boards, each of which composing of 16 channels.

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